Observation of 1D behavior in Si nanowires: Toward high-performance TFETs

Nano Letters

Volumn 12, Issue 11, 2012, Pages 5571-5575

  Salazar, Ramon B ^a   Mehrotra, Saumitra R ^a,b   Klimeck, Gerhard ^a,b   Singh, Navab ^c   Appenzeller, Joerg ^a  

^a PURDUE UNIVERSITY   (United States)

^b Network for Computational Nanotechnology   (United States)

^c INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

capacitance; nanowire; one dimensional; silicon; Sub bands; TFET

Indexed keywords

CAPACITANCE VOLTAGE CHARACTERISTIC; CAPACITOR MODELS; CURRENT RATIOS; EXPERIMENTAL EVIDENCE; LOW TEMPERATURES; ON STATE CURRENT; QUANTUM CAPACITANCE; SI NANOWIRE; SUB-BANDS; TFET; TUNNELING FIELD-EFFECT TRANSISTORS;

CAPACITANCE; NANOWIRES;

SILICON;

METAL NANOPARTICLE; NANOWIRE; OXIDE; SILICON;

ARTICLE; CHEMISTRY; MATERIALS TESTING; METHODOLOGY; NANOTECHNOLOGY; SEMICONDUCTOR; STATISTICAL MODEL; TEMPERATURE; TRANSMISSION ELECTRON MICROSCOPY;

MATERIALS TESTING; METAL NANOPARTICLES; MICROSCOPY, ELECTRON, TRANSMISSION; MODELS, STATISTICAL; NANOTECHNOLOGY; NANOWIRES; OXIDES; SEMICONDUCTORS; SILICON; TEMPERATURE; TRANSISTORS, ELECTRONIC;

EID: 84869161425     PISSN: 15306984     EISSN: 15306992     Source Type: Journal    
DOI: 10.1021/nl3025664     Document Type: Article

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