A physics-based compact model of III-V FETs for digital logic applications: Current-voltage and capacitance-voltage characteristics

IEEE Transactions on Electron Devices

Volumn 56, Issue 12, 2009, Pages 2917-2924

  Oh, Saeroonter ^a   Wong, H S Philip ^a  

^a Stanford University   (United States)

Author keywords

Compact model; Digital logic; III V field effect transistor (FET); InGaAs

Indexed keywords

CAPACITANCE VOLTAGE CHARACTERISTIC; COMPACT MODEL; CURRENT VOLTAGE; DIGITAL CIRCUIT DESIGN; DIGITAL LOGIC; DIGITAL LOGIC APPLICATIONS; ELECTROSTATIC SIMULATIONS; EXPERIMENT DATA; FUTURE TECHNOLOGIES; INGAAS; IV CHARACTERISTICS; NUMERICAL CALCULATION; PERFORMANCE ESTIMATION; PHYSICS-BASED; POTENTIAL PROFILES; QUANTUM-WELL ENERGIES; SHORT-CHANNEL EFFECT;

CIRCUIT SIMULATION; COMPUTER SIMULATION; MESFET DEVICES; PARAMETER EXTRACTION; SEMICONDUCTING INDIUM;

CURRENT VOLTAGE CHARACTERISTICS;

EID: 84859893394     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2033411     Document Type: Article

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