Device modeling for III-V semiconductors - An overview

Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC

Volumn , Issue , 2004, Pages 279-282

  Root, David E ^a   Iwamoto, Masaya ^a   Wood, John ^a  

^a AGILENT TECHNOLOGIES   (United States)

Author keywords

Circuit simulation; Compact models; Device physics; FET; GaAs; GaN; Harmonic balance; HBT; HEMT; InP; Nonlinear device modeling; Parameter extraction; SPICE

Indexed keywords

CIRCUIT SIMULATIONS; COMPACT MODELS; DEVICE PHYSICS; HARMONIC BALANCE; NONLINEAR DEVICE MODELING; PARAMETER EXTRACTION; SPICE;

CAPACITANCE; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC POTENTIAL; FIELD EFFECT TRANSISTORS; GALLIUM NITRIDE; HIGH ELECTRON MOBILITY TRANSISTORS; MATHEMATICAL MODELS; SEMICONDUCTING GALLIUM COMPOUNDS; SEMICONDUCTING INDIUM PHOSPHIDE;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 21644434288     PISSN: 15508781     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CSICS.2004.1392567     Document Type: Conference Paper

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