Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2000, Pages 198-199

  Lee, Wen Chin ^a   Hu, Chenming ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ELECTRON TUNNELING; SEMICONDUCTOR DEVICE MODELS;

HOLE TUNNELING; ULTRATHIN GATE OXIDES;

CMOS INTEGRATED CIRCUITS;

EID: 0033725602     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)