Performance evaluation of 50 nm in0.7Ga0.3As HEMTs for beyond-CMOS logic applications

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 767-770

  Kim, Dae Hyun ^a   Del Alamo, Jesus A ^a   Lee, Jae Hak ^b   Seo, Kwang Seok ^b  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ENERGY DISSIPATION; HIGH ELECTRON MOBILITY TRANSISTORS; MOSFET DEVICES; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING SILICON;

HIGHSPEED PERFORMANCE; NANOMETER; PERFORMANCE EVALUATION; STACK DESIGNS;

CMOS INTEGRATED CIRCUITS;

EID: 33847712552     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

1. Y. Yamashita et al., IEEE Electron Dev. Lett., pp. 573-576 (2002)
2. P. C. Chao et al., IEEE Electron Dev. Lett., pp. 59-61 (1990)
3. K. Murata et al., IEEE JSSC, pp. 207-213 (2004)
4. R. Chau et al., IEEE Trans. On Nanotechnology, pp. 153-158 (2005)
5. S. E. Thompson et al., IEEE Electron Dev. Lett., pp. 191-193 (2004)
6. D. H. Kim et al., IEEE IEDM, pp. 1027-1030 (2004)
7. T. Suemitsu et al., IEEE Trans. On ED, pp. 1074-1079 (1998)
8. K. Shinohara et al., IEEE ISCS Conf, pp. 124-131 (2003)
9. R. Chau et al., Physica E. vol. 19, pp. 1-5 (2003)
10. B. S. et al., VLSI Symp. Tech. Dig., pp. 133-134 (2003)
11. K. Kuhn et al., VLSI Symp. Tech. Dig., (2004)
12. th ISSICT Conf., Beijing, China (2004)