Online task remapping strategies for fault-tolerant network-on-chip multiprocessors

NOCS 2011: The 5th ACM/IEEE International Symposium on Networks-on-Chip

Volumn , Issue , 2011, Pages 129-136

  Derin, Onur ^a   Kabakci, Deniz ^a   Fiorin, Leandro ^a  

^a UNIVERSITY OF LUGANO   (Switzerland)

Author keywords

adaptivity; fault tolerance; Kahn process networks; mapping; Networks on Chip

Indexed keywords

ADAPTIVITY; CMOS TECHNOLOGY; DEEP SUB-MICRON; DESIGN TIME; DETERMINISTIC ROUTING; EXECUTION TIME; FAULT-TOLERANT; INTEGER LINEAR PROGRAMMING; KAHN PROCESS NETWORKS; MESH-BASED NOC; NETWORK ON CHIP; NETWORKS ON CHIPS; OPTIMAL MAPPING; OPTIMAL SOLUTIONS; PROCESSING ELEMENTS; PROCESSING NODES; REMAPPING; SOFTWARE-BASED SOLUTIONS; TASK MAPPING;

CMOS INTEGRATED CIRCUITS; FAULT TOLERANCE; INTEGER PROGRAMMING; MAPPING; MESH NETWORKING; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; OPTIMIZATION; VLSI CIRCUITS;

COMPUTER SYSTEMS PROGRAMMING;

EID: 79960327959     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1999946.1999967     Document Type: Conference Paper

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