Achieving network on chip fault tolerance by adaptive remapping

IPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium

Volumn , Issue , 2009, Pages

  Ababei, Cristinel ^a   Katti, Rajendra ^a  

^a North Dakota State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC APPLICATIONS; EFFICIENT ALGORITHM; NETWORK ON CHIP; NETWORKS ON CHIPS; QUALITY OF RESULTS; REMAPPING; RUNTIMES; SYSTEM FUNCTIONALITY;

ALGORITHMS; DISTRIBUTED PARAMETER NETWORKS; FAULT TOLERANCE; MICROPROCESSOR CHIPS; QUALITY ASSURANCE;

SIMULATED ANNEALING;

EID: 70450058021     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2009.5161202     Document Type: Conference Paper

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