Simulation of single and multi-node collection: Impact on SEU occurrence in nanometric SRAM cells

IEEE Transactions on Nuclear Science

Volumn 58, Issue 3 PART 2, 2011, Pages 862-869

  Touré, Gnima ^a   Hubert, Guillaume ^a   Castellani Couliée, Karine ^b   Duzellier, Sophie ^a   Portal, Jean Michel ^b  

^a ONERA   (France)

^b AIX MARSEILLE UNIVERSITÉ   (France)

Author keywords

Multi collection mechanism; prediction; single event upset; SPICE modelling; SRAM

Indexed keywords

FORECASTING; RADIATION HARDENING;

BULK TECHNOLOGIES; ELECTRICAL SIMULATION; MULTI-NODES; NANOMETRICS; SENSITIVE ZONES; SINGLE EVENT UPSETS; SPICE MODELLING; SRAM CELL;

STATIC RANDOM ACCESS STORAGE;

EID: 79959376330     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2011.2110662     Document Type: Conference Paper

References (33)

1. T.C. May and M.H. Woods, "Alpha-particle-induced soft errors in dynamic memories," IEEE Trans. Electron Devices, vol. ED-54, no. 1, pp. 2-9, Jan. 1979. (Pubitemid 9105259)
2. L.W. Messengill, "Cosmic and terrestrial single event radiation effects in dynamic random access memories," IEEE Trans. Nucl. Sci., vol. 43, no. 2, pp. 576-593, Apr. 1996.
3. P.E. Dodd et al., "Impact of technology trends on SEU in CMOS SRAMs," IEEE Trans. Nucl. Sci., vol. 43, no. 6, pp. 2797-2804, Dec. 1996. (Pubitemid 126770933)
4. S.E. Diehl et al., "Error analysis and prevention of cosmic ion-induced soft errors on static CMOS RAMs," IEEE Trans. Nucl. Sci., vol. 29, no. 6, pp. 2032-2039, Dec. 1982. (Pubitemid 13511084)
5. D. Lambert et al., "Neutron-induced SEU in bulk SRAM's in terrestrial environment simulations and experiments," IEEE Trans. Nucl. Sci., vol. 51, no. 6, pp. 3435-3441, Dec. 2004. (Pubitemid 40044029)
6. P. Roche et al., "Determination of key parameters for SEU using full cell 3-D SRAM simulations," IEEE Trans. Nucl. Sci., vol. 46, no. 6, pp. 1354-1362, Dec. 1999. (Pubitemid 30574240)
7. G. Hubert et al., "Prediction of transient induced by neutron/proton in CMOS combinational logic cells," in Proc. On-Line Testing Symp., 2006, pp. 2-4.
8. J.-M. Palau et al., "Device simulation study of the SEU sensitivity of SRAM's to internal ion tracks generated by nuclear reaction," IEEE Trans. Nucl. Sci., vol. 48, no. 2, pp. 225-231, Apr. 2001. (Pubitemid 32371576)
9. T. Merelle et al., "Monte Carlo exploration of the neutron-induced SEU sensitive volumes in SRAMs," IEEE Trans. Nucl. Sci., vol. 49, no. 6, pp. 3075-3081, Dec. 2002.
10. P.E. Dodd and F.W. Sexton, "Critical charge concepts for CMOS SRAMs," IEEE Trans. Nucl. Sci., vol. 42, no. 6, pp. 1764-1771, Dec. 1995.
11. J.-M. Palau et al., "Contribution of device simulation to SER understanding," in Proc. IEEE 41st Int. Reliability Symp, Dallas, TX, 2003, p. 72.
12. E.L. Petersen et al., "Rate prediction for single event effects," IEEE Trans. Nucl. Sci, vol. 3, no. 6, pp. 1577-1604, Dec. 1992.
13. L. Artola et al., "Collected charge analysis for a newadvanced transient model by TCAD simulation in 90 nm technology," IEEE Trans. Nucl. Sci., vol. 57, no. 4, pp. 1869-1875, Apr. 2010.
14. M. Raine et al., "Effect of the ion mass and energy on the response of 70-nm SOI transistors to the ion deposited charge by direct ionization," IEEE Trans. Nucl. Sci, vol. 57, no. 6, pp. 1892-1899, Dec. 2010.
15. E.H. Cannon et al., "Multi-bit upsets in 65 nm SOI SRAMs," in Proc. Reliability Physics Symp. IRPS, 2008, pp. 196-199.
16. R.K. Lawrence et al., "Single event effect induced multiple-cell upset in a commercial 90 nm CMOS digital technology," IEEE Trans. Nucl. Sci, vol. 55, no. 6, pp. 3367-3374, Dec. 2008.
17. N. Seifert et al., "Multi-cell upset probabilities of 45 nm high-k + metal gate SRAM devices in terrestrial and space environments," in Proc. Reliability Physics Symp. IRPS, 2008, pp. 183-185.
18. A. Oluwole et al., "Charge collection and charge sharing in a 130 nm CMOS technology," IEEE Trans. Nucl. Sci, vol. 53, no. 6, pp. 3253-3258, Dec. 2006.
19. B.D. Olson et al., "Analysis of parasitic bipolar transistor mitigation using well contacts in 130 nm and 90 nm CMOS technology," IEEE Trans. Nucl. Sci, vol. 54, no. 4, pp. 894-897, Aug. 2007. (Pubitemid 47295047)
20. A.M. Francis et al., "Significance of strike model in circuit-level prediction of charge sharing upsets," IEEE Trans. Nucl. Sci, vol. 56, no. 6, pp. 3109-3114, Dec. 2009.
21. J.D. Black et al., "Characterizing SRAM single event upset in terms of single and multiple node charge collection," IEEE Trans. Nucl. Sci, vol. 55, no. 6, pp. 2943-2947, Dec. 2008.
22. S.V. Walstra and C. Dai, "Circuit-level modeling of soft errors in integrated circuits," IEEE Trans. Device Mater. Reliab., vol. 5, no. 3, pp. 358-364, Dec. 2005.
23. 3 )," IEEE Trans. Nucl. Sci, vol. 56, no. 6, pp. 3032-3042, Dec. 2009.
24. G. Hubert et al., "Impact of the solar flares on the SER dynamics on micro and nanometric technologies," IEEE Trans. Nucl. Sci, vol. 57, no. 6, p. 3128, Jun. 2010.
25. 3 calculations," in Proc. 15th IEEE Int. On-Line Testing Symp. IOLTS 2009, p. 180.
26. V. Correas et al., "Innovative simulations of heavy ion cross sections in 130 nm CMOS SRAM," IEEE Trans. Nucl. Sci, vol. 54, no. 6, pp. 2416-2418, Dec. 2007.
27. 2 Embedded 6T-SRAM bit cell for 65 nm CMOS platform," in Proc. VLSI Design Conf., 2003, pp. 65-66.
28. Multi-Project Circuits. [Online]. Available: www.cmp.imag.fr
29. N. Seifert, V. Ambrose, B. Gill, Q. Shi, R. Allmon, C. Recchia, S. Mukherjee, N. Nassif, J. Krause, J. Pickholtz, and A. Balasubramanian, "On the radiation-induced soft error performance of hardened sequential elements in advanced bulk CMOS technologies," in Proc. IEEE Int. Reliability Phys. Symp. (IRPS), 2010, pp. 188-197.
30. G. Allen, Virtex-4QV Static SEU Characterization Summary JPL Publication 08-16 4/08 and National Aeronautics and Space Administration 939904.01.11.30.
31. D. Giot et al., "Multiple-bit upset analysis in 90 nm SRAMs: Heavy ions testing and 3-D simulations," IEEE TNS, vol. 54, no. 4, 2007.
32. S.E. Kerns et al., "Model for CMOS/SOI single-event vulnerability," IEEE Trans. Nucl. Sci, vol. 36, no. 6, pp. 2305-2310, Dec. 1989. (Pubitemid 20654374)
33. M. Raine, G. Hubert, L. Artola, M. Gaillardin, S. Girard, J.-E. Sauvestre, and A. Bournel, "Impact of the radial ionization profile on see prediction for SOI transistors and SRAMs beyond the 32 nm technological node," Proc. RADECS, 2010.