A Functional 0.69μm2 Embedded 6T-SRAM bit cell for 65nm CMOS platform

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2003, Pages 65-66

  Arnaud, F ^a   Boeuf, F ^a   Salvetti, F ^b   Lenoble, D ^a   Wacquant, F ^a   Regnier, C ^a   Morin, P ^a   Emonet, N ^a   Denis, E ^a   Oberlin, J C ^a   Ceccarelli, D ^a   Vannier, P ^a   Imbert, G ^a   Sicard, A ^a   Perrot, C ^a   Belmont, O ^a   Guilmeau, I ^d   Sassoulas, P O ^a   Delmedico, S ^a   Palla, R ^a   Leverd, F ^a   Beverina, A ^a   DeJonghe, V ^b   Broekaart, M ^b   Pain, L ^d   Todeschini, J ^b   Charpin, M ^d   Laplanche, Y ^a   Neira, D ^a   Vachellerie, V ^a   Borot, B ^a   Devoivre, T ^a   Bicais N ^a   Hinschberger, B ^a   Pantel, R ^a   Revil, N ^a   Parthasarathy, C ^a   Planes, N ^a   Brut, H ^a   Farkas, J ^c   Uginet, J ^a   Stolk, P ^b   Woo, M ^c   more..

^a STMICROELECTRONICS   (France)

^b NXP SEMICONDUCTORS   (Netherlands)

^c MOTOROLA INC   (United States)

^d CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

DOPING (ADDITIVES); EMBEDDED SYSTEMS; GATES (TRANSISTOR); IMAGING SYSTEMS; METALLIZING; PHOTOLITHOGRAPHY; SCANNING ELECTRON MICROSCOPY; CMOS INTEGRATED CIRCUITS;

SOURCE-DRAIN EXTENSION (SDE) DESIGN;

CMOS INTEGRATED CIRCUITS; PHOTOLITHOGRAPHY;

65NM CMOS; 65NM CMOS TECHNOLOGY; 6T-SRAM; CELL-SIZE; ELECTRICAL DATA; GATE-LENGTH; LOW POWER; SRAM BIT CELL; SRAM CELL; TECHNOLOGY PLATFORMS;

EID: 0141538345     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. Yanagiya et al, IEDM tech. Digest, pp 57-60, 2002.
2. S.S.Chung et al., Symposium on VLSI Tech., pp74-75, 2002.
3. D.Lenoble et al, Ion Implantation Technology International Conference, 2002.