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Volumn 58, Issue 5, 2011, Pages 1344-1351

Electron trapping in HfAlO high-κ stack for flash memory applications: An origin of Vth window closure during cycling operations

Author keywords

Electron trap; endurance; energy distribution; Flash memory; high dielectrics; pulsed I V; window closure

Indexed keywords

DEEP LEVEL; ELECTRON TRAPPING; ENDURANCE; ENERGY DISTRIBUTION; ENERGY DISTRIBUTIONS; ENERGY LEVEL; MEMORY APPLICATIONS; MEMORY TECHNOLOGY; MULTI-PULSE TECHNIQUES; PROGRAM/ERASE; PROGRAMMING PULSE; PULSED I-V; VOLTAGE WINDOW;

EID: 79955531120     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2011.2115244     Document Type: Article
Times cited : (17)

References (23)
  • 3
    • 28044445399 scopus 로고    scopus 로고
    • Scaling down the interpoly dielectric for next generation Flash memory: Challenges and opportunities
    • DOI 10.1016/j.sse.2005.10.018, PII S0038110105002789
    • B. Govoreanu, D. P. Brunco, and J. Van Houdt, "Scaling down the interpoly dielectric for next generation Flash memory: Challenges and opportunities," Solid State Electron., vol. 49, no. 11, pp. 1841-1848, Nov. 2005. (Pubitemid 41690870)
    • (2005) Solid-State Electronics , vol.49 , Issue.11 SPEC. ISSUE , pp. 1841-1848
    • Govoreanu, B.1    Brunco, D.P.2    Van Houdt, J.3
  • 4
    • 50249175135 scopus 로고    scopus 로고
    • Memory technologies for sub-40 nm node
    • K. Kim and G. Jeong, "Memory technologies for sub-40 nm node," in IEDM Tech. Dig., 2007, pp. 27-30.
    • (2007) IEDM Tech. Dig , pp. 27-30
    • Kim, K.1    Jeong, G.2
  • 5
    • 70349987558 scopus 로고    scopus 로고
    • Band engineered charge trap NAND Flash with sub-40 nm process technologies
    • S. Choi, S. J. Baik, and J. T. Moon, "Band engineered charge trap NAND Flash with sub-40 nm process technologies," in IEDM Tech. Dig., 2008, pp. 925-928.
    • (2008) IEDM Tech. Dig , pp. 925-928
    • Choi, S.1    Baik, S.J.2    Moon, J.T.3
  • 6
    • 0038732556 scopus 로고    scopus 로고
    • VARIOT: A novel multilayer tunnel barrier concept, for low-voltage nonvolatile memory devices
    • Feb
    • B. Govoreanu, P. Blomme, M. Rosmeulen, J. Van Houdt, and K. De Meyer, "VARIOT: A novel multilayer tunnel barrier concept, for low-voltage nonvolatile memory devices," IEEE Electron Device Lett., vol. 24, no. 2, pp. 99-101, Feb. 2003.
    • (2003) IEEE Electron Device Lett. , vol.24 , Issue.2 , pp. 99-101
    • Govoreanu, B.1    Blomme, P.2    Rosmeulen, M.3    Van Houdt, J.4    De Meyer, K.5
  • 8
    • 64549084894 scopus 로고    scopus 로고
    • Statistical investigation of the floating gate memory cell leakage through high-Aî interpoly dielectrics and its impact on scalability and reliability
    • B. Govoreanu, R. Degraeve, J. Van Houdt, and M. Jurczak, "Statistical investigation of the floating gate memory cell leakage through high-Aî interpoly dielectrics and its impact on scalability and reliability," in IEDM Tech. Dig., 2008, pp. 1-4.
    • (2008) IEDM Tech. Dig , pp. 1-4
    • Govoreanu, B.1    Degraeve, R.2    Van Houdt, J.3    Jurczak, M.4
  • 12
    • 46049112509 scopus 로고    scopus 로고
    • Fundamental understanding and optimization of PBT1 in nFETs with SiO2/HfO2 gate stack
    • E. Cartier, B. P. Linder, V Narayanan, and V K. Paruchuri, "Fundamental understanding and optimization of PBT1 in nFETs with SiO2/HfO2 gate stack," in IEDM Tech. Dig., 2006, pp. 57-60.
    • (2006) IEDM Tech. Dig , pp. 57-60
    • Cartier, E.1    Linder, B.P.2    Narayanan, V.3    Paruchuri, V.K.4
  • 13
    • 46049104943 scopus 로고    scopus 로고
    • Frequency dependent charge-pumping, how deep does it probe?"
    • Y. Wang, V. Lee, and K. P. Cheung, "Frequency dependent charge-pumping, how deep does it probe?" IEDM Tech. Dig., 2006, pp. 491-494.
    • (2006) IEDM Tech. Dig , pp. 491-494
    • Wang, Y.1    Lee, V.2    Cheung, K.P.3
  • 14
    • 64549147008 scopus 로고    scopus 로고
    • Trap Spectroscopy by Charge Injection and Sensing (TSCIS): A quantitative electrical tech-nique for studying defects in dielectric stacks
    • R. Degraeve, M. Cho, B. Govoreanu, B. Kaczer, M. B. Zahid, J. Van Houdt, M. Jurczak, and G. Groeseneken, "Trap Spectroscopy by Charge Injection and Sensing (TSCIS): A quantitative electrical tech-nique for studying defects in dielectric stacks," in IEDM Tech. Dig., 2008, pp. 1-4.
    • (2008) IEDM Tech. Dig , pp. 1-4
    • Degraeve, R.1    Cho, M.2    Govoreanu, B.3    Kaczer, B.4    Zahid, M.B.5    Van Houdt, J.6    Jurczak, M.7    Groeseneken, G.8
  • 15
    • 0001456937 scopus 로고
    • A comparative-study of the electron trapping and thermal detrapping in SiO2 prepared by plasma and thermal oxidation
    • Aug
    • J. F. Zhang, S. Taylor, and W. Eccleston, "A comparative-study of the electron trapping and thermal detrapping in SiO2 prepared by plasma and thermal oxidation," J. Appl. Phys., vol. 72, no. 4, pp. 1429-1435, Aug. 1992.
    • (1992) J. Appl. Phys. , vol.72 , Issue.4 , pp. 1429-1435
    • Zhang, J.F.1    Taylor, S.2    Eccleston, W.3
  • 16
    • 0036865978 scopus 로고    scopus 로고
    • Two types of neutral electron traps generated in the gate silicon dioxide
    • Nov
    • W. D. Zhang, J. F. Zhang, R. Degraeve, and G. Groeseneken, "Two types of neutral electron traps generated in the gate silicon dioxide," IEEE Trans. Electron Devices, vol. 49, no. 11, pp. 1868-1875, Nov. 2002.
    • (2002) IEEE Trans. Electron Devices , vol.49 , Issue.11 , pp. 1868-1875
    • Zhang, W.D.1    Zhang, J.F.2    Degraeve, R.3    Groeseneken, G.4
  • 18
    • 77956985974 scopus 로고    scopus 로고
    • A new multi-pulse technique for probing electron trap energy distribution in high-κ materials for Flash memory application
    • Oct
    • X. F. Zheng, W. D. Zhang, B. Govoreanu, J. F. Zhang, and J. Van Houdt, "A new multi-pulse technique for probing electron trap energy distribution in high-κ materials for Flash memory application," IEEE Trans. Electron Devices, vol. 57, no. 10, pp. 2484-2492, Oct. 2010.
    • (2010) IEEE Trans. Electron Devices , vol.57 , Issue.10 , pp. 2484-2492
    • Zheng, X.F.1    Zhang, W.D.2    Govoreanu, B.3    Zhang, J.F.4    Van Houdt, J.5
  • 20
    • 33751112213 scopus 로고    scopus 로고
    • Determination of capture cross sections for as-grown electron traps in HfO2/HfSiO stacks
    • Nov
    • C Z. Zhao, J. F Zhang, M. B. Zahid, B. Govoreanu, G. Groeseneken, and S. De Gendt, "Determination of capture cross sections for as-grown electron traps in HfO2/HfSiO stacks," J. Appl. Phys., vol. 100, no. 9, p. 093716, Nov. 2006.
    • (2006) J. Appl. Phys. , vol.100 , Issue.9 , pp. 093716
    • Zhao, C.Z.1    Zhang, J.F.2    Zahid, M.B.3    Govoreanu, B.4    Groeseneken, G.5    De Gendt, S.6
  • 21
    • 73349107117 scopus 로고    scopus 로고
    • Energy and spatial distribution of electron traps throughout SiO2/Al2O3 stacks as the IPD in Flash memory application
    • Jan
    • X. F Zheng, W. D. Zhang, B. Govoreanu, D. Ruiz Aguado, and J. F Zhang, "Energy and spatial distribution of electron traps throughout SiO2/Al2O3 stacks as the IPD in Flash memory application," IEEE Trans. Electron Devices, vol. 57, no. 1, pp. 288-296, Jan. 2010.
    • (2010) IEEE Trans. Electron Devices , vol.57 , Issue.1 , pp. 288-296
    • Zheng, X.F.1    Zhang, W.D.2    Govoreanu, B.3    Ruiz Aguado, D.4    Zhang, J.F.5
  • 22
    • 67349184324 scopus 로고    scopus 로고
    • Understanding the poten-tial and limitations of HfAlO as interpoly dielectric in floating-gate Flash memory
    • Jul.-Sep
    • B. Govoreanu, R. Degraeve, M. B. Zahid, L. Nyns, M. Cho, B. Kaczer, M. Jurczak, J. A. Kittl, and J. Van Houdt, "Understanding the poten-tial and limitations of HfAlO as interpoly dielectric in floating-gate Flash memory," Microelectron. Eng., vol. 86, no. 7-9, pp. 1807-1811, Jul.-Sep. 2009.
    • (2009) Microelectron. Eng. , vol.86 , Issue.7-9 , pp. 1807-1811
    • Govoreanu, B.1    Degraeve, R.2    Zahid, M.B.3    Nyns, L.4    Cho, M.5    Kaczer, B.6    Jurczak, M.7    Kittl, J.A.8    Van Houdt, J.9
  • 23
    • 46649088331 scopus 로고    scopus 로고
    • Improving the retention and endurance characteristics of charge-trapping memory by using double quantum barriers
    • Jul
    • S. H. Lin, H. J. Yang, W. B. Chen, F S. Yeh, S. P. McAlister, and A. Chin, "Improving the retention and endurance characteristics of charge-trapping memory by using double quantum barriers," IEEE Trans. Electron Devices, vol. 55, no. 7, pp. 1708-1713, Jul. 2008.
    • (2008) IEEE Trans. Electron Devices , vol.55 , Issue.7 , pp. 1708-1713
    • Lin, S.H.1    Yang, H.J.2    Chen, W.B.3    Yeh, F.S.4    McAlister, S.P.5    Chin, A.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.