-
1
-
-
0027700936
-
A novel MONOS nonvolatile memory device ensuring 10-year data retention after 107 erase/write cycles
-
Nov
-
S.-I. Minami and Y. Kamigaki, "A novel MONOS nonvolatile memory device ensuring 10-year data retention after 107 erase/write cycles," IEEE Trans. Electron Devices, vol. 40, no. 11, pp. 2011-2017, Nov. 1993.
-
(1993)
IEEE Trans. Electron Devices
, vol.40
, Issue.11
, pp. 2011-2017
-
-
Minami, S.-I.1
Kamigaki, Y.2
-
2
-
-
0031165055
-
A low voltage SONOS nonvolatile semiconductor memory technology
-
Jun
-
M. H. White, Y. Yang, A. Purwar, and M. L. French, "A low voltage SONOS nonvolatile semiconductor memory technology," IEEE Trans. Compon., Packag., Manuf. Technol. A, vol. 20, no. 2, pp. 190-195, Jun. 1997.
-
(1997)
IEEE Trans. Compon., Packag., Manuf. Technol. A
, vol.20
, Issue.2
, pp. 190-195
-
-
White, M.H.1
Yang, Y.2
Purwar, A.3
French, M.L.4
-
3
-
-
1942485688
-
Improved SONOS-type flash memory using HfO as trapping layer
-
M. She, H. Takeuchi, and T.-J. King, "Improved SONOS-type flash memory using HfO as trapping layer," in Proc. IEEE Nonvolatile Semicond. Memory Workshop, 2003, pp. 53-55.
-
(2003)
Proc. IEEE Nonvolatile Semicond. Memory Workshop
, pp. 53-55
-
-
She, M.1
Takeuchi, H.2
King, T.-J.3
-
4
-
-
0842266575
-
3 with TaN metal gate for multi-giga bit flash memories
-
3 with TaN metal gate for multi-giga bit flash memories," in IEDM Tech. Dig., 2003, pp. 613-616.
-
(2003)
IEDM Tech. Dig
, pp. 613-616
-
-
Lee, C.H.1
Choi, K.I.2
Cho, M.K.3
Song, Y.H.4
Park, K.C.5
Kim, K.6
-
5
-
-
21644475526
-
Damascence gate FinFET SONOS memory implemented on bulk silicon wafer
-
C. W. Oh, S. D. Suk, Y. K. Lee, S. K. Sung, J.-D. Choe, S.-Y. Lee, D. U. Choi, K. H. Yeo, M. S. Kim, S.-M. Kim, M. Li, S. H. Kim, E.-J. Yoon, D.-W. Kim, D. Park, K. Kim, and B.-I. Ryu, "Damascence gate FinFET SONOS memory implemented on bulk silicon wafer," in IEDM Tech. Dig. 2004, pp. 893-896.
-
(2004)
IEDM Tech. Dig
, pp. 893-896
-
-
Oh, C.W.1
Suk, S.D.2
Lee, Y.K.3
Sung, S.K.4
Choe, J.-D.5
Lee, S.-Y.6
Choi, D.U.7
Yeo, K.H.8
Kim, M.S.9
Kim, S.-M.10
Li, M.11
Kim, S.H.12
Yoon, E.-J.13
Kim, D.-W.14
Park, D.15
Kim, K.16
Ryu, B.-I.17
-
6
-
-
4544344826
-
Sub-40 nm tri-gate charge trapping nonvolatile memory cells for high-density applications
-
M. Specht, R. Kommling, L. Dreeskornfeld, W. Weber, F. Hofmann, D. Alvarez, J. Kretz, R. J. Luyken, W. Rosner, H. Reisinger, E. Landgraf, T. Schulz, J. Hartwich, M. Stadele, V. Klandievski, E. Hartmann, and L. Risch, "Sub-40 nm tri-gate charge trapping nonvolatile memory cells for high-density applications," in VLSI Symp. Tech. Dig., 2004, pp. 244-245.
-
(2004)
VLSI Symp. Tech. Dig
, pp. 244-245
-
-
Specht, M.1
Kommling, R.2
Dreeskornfeld, L.3
Weber, W.4
Hofmann, F.5
Alvarez, D.6
Kretz, J.7
Luyken, R.J.8
Rosner, W.9
Reisinger, H.10
Landgraf, E.11
Schulz, T.12
Hartwich, J.13
Stadele, M.14
Klandievski, V.15
Hartmann, E.16
Risch, L.17
-
7
-
-
1942519858
-
A novel MONOS-type nonvolatile memory using high-κ, dielectrics for improved data retention and programming speed
-
Apr
-
X. Wang, J. Liu, W. Bai, and D.-L. Kwong, "A novel MONOS-type nonvolatile memory using high-κ, dielectrics for improved data retention and programming speed," IEEE Trans. Electron Devices, vol. 51, no. 4, pp. 597-602, Apr. 2004.
-
(2004)
IEEE Trans. Electron Devices
, vol.51
, Issue.4
, pp. 597-602
-
-
Wang, X.1
Liu, J.2
Bai, W.3
Kwong, D.-L.4
-
8
-
-
21644484957
-
High-κ, HfAIO charge trapping layer in SONOS-type nonvolatile memory device for high speed operation
-
Y. N. Tan, W. K. Chim, W. K. Choi, M. S. Joo, T. H. Ng, and B. J. Cho, "High-κ, HfAIO charge trapping layer in SONOS-type nonvolatile memory device for high speed operation," in IEDM Tech. Dig., 2004, pp. 889-892.
-
(2004)
IEDM Tech. Dig
, pp. 889-892
-
-
Tan, Y.N.1
Chim, W.K.2
Choi, W.K.3
Joo, M.S.4
Ng, T.H.5
Cho, B.J.6
-
9
-
-
34249940320
-
A bandgap engineered SONOS with excellent performance and reliability
-
H. T. Lue, S. Y. Wang, E. K. Lai, Y. H. Shih, S. C. Lai, L. W. Yang, K. C. Chen, J. Ku, K. Y. Hsieh, R. Liu, and C. Y. Lu, "A bandgap engineered SONOS with excellent performance and reliability," in IEDM Tech. Dig., 2005, pp. 555-558.
-
(2005)
IEDM Tech. Dig
, pp. 555-558
-
-
Lue, H.T.1
Wang, S.Y.2
Lai, E.K.3
Shih, Y.H.4
Lai, S.C.5
Yang, L.W.6
Chen, K.C.7
Ku, J.8
Hsieh, K.Y.9
Liu, R.10
Lu, C.Y.11
-
10
-
-
33745134383
-
th and good retention
-
th and good retention," in VLSI Symp. Tech. Dig., 2005, pp. 210-211.
-
(2005)
VLSI Symp. Tech. Dig
, pp. 210-211
-
-
Lai, C.H.1
Chin, A.2
Chiang, K.C.3
Yoo, W.J.4
Cheng, C.F.5
McAlister, S.P.6
Chi, C.C.7
Wu, P.8
-
11
-
-
33847702105
-
3/TaN memory with good retention
-
3/TaN memory with good retention," in IEDM Tech. Dig., 2005, pp. 165-168.
-
(2005)
IEDM Tech. Dig
, pp. 165-168
-
-
Chin, A.1
Laio, C.C.2
Chiang, K.C.3
Yu, D.S.4
Yoo, W.J.5
Samudra, G.S.6
McAlister, S.P.7
Chi, C.C.8
-
12
-
-
41149145759
-
2/HfON/HfAlO/TaN memory with fast speed and good retention
-
2/HfON/HfAlO/TaN memory with fast speed and good retention," in VLSI Symp. Tech. Dig., 2006, pp. 54-55.
-
(2006)
VLSI Symp. Tech. Dig
, pp. 54-55
-
-
Lai, C.H.1
Chin, A.2
Kao, H.L.3
Chen, K.M.4
Hong, M.5
Kwo, J.6
Chi, C.C.7
-
13
-
-
46049095270
-
Novel charge trap devices with NCBO trap layers for NVM or image sensor
-
K. H. Joo, C. R. Moon, S. N. Lee, X. Wang, J. K. Yang, I. S. Yeo, D. Lee, O. Nam, U. I. Chung, J. T. Moon, and B. I. Ryu, "Novel charge trap devices with NCBO trap layers for NVM or image sensor," in IEDM Tech. Dig., 2006, pp. 979-982.
-
(2006)
IEDM Tech. Dig
, pp. 979-982
-
-
Joo, K.H.1
Moon, C.R.2
Lee, S.N.3
Wang, X.4
Yang, J.K.5
Yeo, I.S.6
Lee, D.7
Nam, O.8
Chung, U.I.9
Moon, J.T.10
Ryu, B.I.11
-
14
-
-
33750164092
-
Extraction of nitride trap density from stress induced leakage current in silicon-oxide-nitride-oxide-silicon flash memory
-
Oct
-
S. H. Gu, T. Wang, W. P. Lu, Y. H. Ku, and C. Y Lu, "Extraction of nitride trap density from stress induced leakage current in silicon-oxide-nitride-oxide-silicon flash memory," Appl. Phys. Lett. vol. 89, no. 16, p. 163-514, Oct. 2006.
-
(2006)
Appl. Phys. Lett
, vol.89
, Issue.16
, pp. 163-514
-
-
Gu, S.H.1
Wang, T.2
Lu, W.P.3
Ku, Y.H.4
Lu, C.Y.5
-
15
-
-
34948862160
-
-
0.5 MIS capacitor with good retention, IEEE Electron Device Lett., 28, no. 10, pp. 913-915, Oct. 2007.
-
0.5 MIS capacitor with good retention," IEEE Electron Device Lett., vol. 28, no. 10, pp. 913-915, Oct. 2007.
-
-
-
-
16
-
-
46049092232
-
3Si-TaN]/HfLaON CMOS with large work-function difference
-
3Si-TaN]/HfLaON CMOS with large work-function difference," in IEDM Tech. Dig., 2006, pp. 617-620.
-
(2006)
IEDM Tech. Dig
, pp. 617-620
-
-
Wu, C.H.1
Hung, B.F.2
Chin, A.3
Wang, S.J.4
Wang, X.P.5
Li, M.-F.6
Zhu, C.7
Jin, Y.8
Tao, H.J.9
Chen, S.C.10
Liang, M.S.11
-
17
-
-
0034187380
-
Band offsets of wide-band-gap oxides and implications for future electron devices
-
May
-
J. Robertson, "Band offsets of wide-band-gap oxides and implications for future electron devices," J. Vac. Sci. Technol. A Microelectron. Process. Phenom., vol. 18, no. 3, pp. 1785-1791, May 2000.
-
(2000)
J. Vac. Sci. Technol. A Microelectron. Process. Phenom
, vol.18
, Issue.3
, pp. 1785-1791
-
-
Robertson, J.1
-
18
-
-
79955987885
-
1-x on (100) Si
-
Jul
-
1-x on (100) Si," Appl. Phys. Lett., vol. 81, no. 2, pp. 376-378, Jul. 2002.
-
(2002)
Appl. Phys. Lett
, vol.81
, Issue.2
, pp. 376-378
-
-
Yu, H.Y.1
Li, M.F.2
Cho, B.J.3
Yeo, C.C.4
Joo, M.S.5
-
19
-
-
44949119341
-
15 nm planar bulk SONOS-type memory with double junction tunnel layers using subthreshold slope control
-
R. Ohba, Y. Mitani, N. Sugiyama, and S. Fujita, "15 nm planar bulk SONOS-type memory with double junction tunnel layers using subthreshold slope control," in IEDM Tech. Dig., 2007, pp. 75-78.
-
(2007)
IEDM Tech. Dig
, pp. 75-78
-
-
Ohba, R.1
Mitani, Y.2
Sugiyama, N.3
Fujita, S.4
-
20
-
-
46649098621
-
Profiling of nitride-trap-energy distribution in SONOS flash memory by using a variable-amplitude low-frequency charge-pumping technique
-
Sep
-
Y. Y. Liao, S. F. Horng, Y. W. Chang, T. C. Lu, K. C. Chen, T. Wang, and C. Y. Lu, "Profiling of nitride-trap-energy distribution in SONOS flash memory by using a variable-amplitude low-frequency charge-pumping technique," IEEE Electron Device Lett., vol. 28, no. 9, pp. 828-830, Sep. 2007.
-
(2007)
IEEE Electron Device Lett
, vol.28
, Issue.9
, pp. 828-830
-
-
Liao, Y.Y.1
Horng, S.F.2
Chang, Y.W.3
Lu, T.C.4
Chen, K.C.5
Wang, T.6
Lu, C.Y.7
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