A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 45, Issue 6, 2010, Pages 1111-1121

  Zhu, Yan ^a   Chan, Chi Hang ^a   Chio, U Fat ^a   Sin, Sai Weng ^a   U, Seng Pan ^a   Martins, Rui Paulo ^a,b   Maloberti, Franco ^a,c  

^a UNIVERSITY OF MACAU   (Macao)

^b INSTITUTO SUPERIOR TÉCNICO   (Portugal)

^c UNIVERSITY OF PAVIA   (Italy)

Author keywords

Charge recovery; Reference free; Switched technique

Indexed keywords

ELECTRICAL ENGINEERING; NETWORKS (CIRCUITS);

CHARGE RECOVERY; LOW-POWER OPERATION; ON-CHIP REFERENCES; REFERENCE-FREE; STATIC-POWER DISSIPATION; SUCCESSIVE APPROXIMATIONS; SWITCHED TECHNIQUE; TOTAL POWER CONSUMPTION;

CMOS INTEGRATED CIRCUITS;

EID: 77953275222     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2010.2048498     Document Type: Article

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