A 10-bit 50-MS/s pipelined ADC with opamp current reuse

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 3, 2007, Pages 475-485

  Ryu, Seung Tak ^a,b,c   Song, Bang Sup ^a,b   Bacrania, Kantilal ^a,d  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c SAMSUNG Electronics   (South Korea)

^d Wireless Data and Networking Component Products   (United States)

Author keywords

Capacitor array multiplying digital to analog converter (MDAC); Digital to analog converter (DAC); Low power technique; Opamp sharing; Pipelined analog to digital converter (ADC); Switched opamp

Indexed keywords

LOW-POWER TECHNIQUE; OPAMP-SHARING; PIPELINED ANALOG-TO-DIGITAL CONVERTER (ADC); SWITCHED-OPAMP;

BUFFER STORAGE; DIGITAL TO ANALOG CONVERSION; ELECTRIC POWER UTILIZATION; MOS CAPACITORS; OPERATIONAL AMPLIFIERS; PIPELINE PROCESSING SYSTEMS;

ANALOG TO DIGITAL CONVERSION;

EID: 33847752977     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.891718     Document Type: Article

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