A self-timing switch-driving register by precharge-evaluate logic for high-speed SAR ADCs

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Volumn , Issue , 2008, Pages 1164-1167

  Chio, U Fat ^a   Wei, He Gong ^a   Zhu, Yan ^a   Sin, Sai Weng ^a   Seng Pan, U ^a,b   RPMartins, ^a,c  

^a UNIVERSITY OF MACAU   (Macao)

^b Chipidea Microelectronics Ltd   (Macao)

^c INSTITUTO SUPERIOR TÉCNICO   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

FAST CHARGING (BATTERIES);

90-NM CMOS; COMPARISON RESULT; HIGH SAMPLING RATES; HIGH SPEED; PRECHARGE-EVALUATE LOGIC; PROPAGATION DELAYS; SELF-TIMING; SUCCESSIVE APPROXIMATION REGISTER;

TIMING CIRCUITS;

EID: 62949100413     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2008.4746232     Document Type: Conference Paper

References (9)

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