An Energy-Efficient Charge Recycling Approach for a SAR Converter With Capacitive DAC

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 184-187

  Ginsburg, Brian P ^a   Chandrakasan, Anantha P ^a  

^a USA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITOR ARRAYS; CHARGE RECYCLING; CMOS PROCESS; ENERGY EFFICIENT; FORMAL SOLUTION; HSPICE SIMULATIONS; SUCCESSIVE APPROXIMATION REGISTER; SWITCHING ENERGY; SWITCHING METHODS;

ANALOG TO DIGITAL CONVERSION; APPROXIMATION THEORY; CAPACITANCE; DIGITAL INTEGRATED CIRCUITS; ENERGY EFFICIENCY; SWITCHING; SYNTHETIC APERTURES;

CAPACITORS;

EID: 33847731110     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1464555     Document Type: Conference Paper

References (4)

1. J. Park, H.-J. Park, J.-W. Kim, S. Seo, and P. Chung, "A 1 mW 10-bit 500KSps SAR A/D Converter," in Proc. 2000 IEEE Int. Symp. Circuits and Systems, 2000, vol. 5, 2000, pp. 581-584.
2. D. Draxelmayr, "A 6b 600MHz 10mW ADC Array in Digital 90nm CMOS," in ISSCC Dig. Tech. Papers, Feb. 2004, pp. 264-265.
3. D. Johns and K. Martin, Analog Integrated Circuit Design. NewYork: John Wiley & Sons, Inc., 1997.
4. K.-Y. Khoo and A. Willson, "Charge Recovery on a Databus," in Proc. Int. Symp. on Low Power Elec. and Design, 1995, pp. 185-189.