Power efficient gigabit communication over capacitively driven RC-limited on-Chip interconnects

IEEE Journal of Solid-State Circuits

Volumn 45, Issue 2, 2010, Pages 447-457

  Mensink, Eisse ^a   Schinkel, Daniël ^b   Klumperink, Eric A M ^c   Van Tuijl, Ed ^b,c   Nauta, Bram ^c  

^a Bruco Integrated Circuits BV   (Netherlands)

^b Axiom IC Twente   (Netherlands)

^c UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

Capacitive coupling; CMOS; Communication techniques; De emphasis; Decision feedback equalization; Equalization; Low power electronics; Low swing; Networks on chip; NoC; On chip interconnects; On chip wires; Pre emphasis; RC limited interconnects

Indexed keywords

CAPACITIVE COUPLINGS; COMMUNICATION TECHNIQUES; DECISION-FEEDBACK EQUALIZATIONS; LOW SWING; NETWORKS ON CHIPS; ON CHIPS; ON-CHIP INTERCONNECTS; PRE-EMPHASIS;

AMPLIFIERS (ELECTRONIC); CAPACITANCE; INTERCONNECTION NETWORKS; LOW POWER ELECTRONICS; MICROPROCESSOR CHIPS; POWER ELECTRONICS; SCATTERING PARAMETERS; WIRE;

COMMUNICATION;

EID: 76849106293     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2036761     Document Type: Article

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