High speed current-mode signaling circuits for On- Chip Interconnects

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 4138-4141

  Katoch, Atul ^a   Seevinck, Evert ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b Circuit Research International   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DESIGN TECHNIQUES; CIRCUIT TECHNIQUES; CMOS TECHNOLOGY; CURRENT MODE; CURRENT-MODE CIRCUIT; CURRENT-MODE SIGNALING; DATA RATES; GLOBAL WIRES; HIGH POWER CONSUMPTION; HIGH-SPEED SIGNALS; ON CHIPS; ON-CHIP INTERCONNECTS; POWER DISSIPATION; POWER EFFICIENT; POWER PENALTY; PROPAGATION DELAYS; TECHNOLOGICAL EFFORT; VOLTAGE MODE; VOLTAGE MODE SIGNALING;

ACTIVE FILTERS; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; OPTICAL INTERCONNECTS; SIGNALING;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 34247581001     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465542     Document Type: Conference Paper

References (7)

1. Richard T. Chang, Niranjan Talwalkar, C. Patrick Yue and S. Simon Wong, "Near Speed-of-Light Signaling Over On-Chip Electrical Interconnects," IEEE Journal of Solid State Circuits, May 2003.
2. Atul Maheshwari and Wayne Burleson, "Current sensing techniques for global interconnects in very deep submicron (VDSM) CMOS," IEEE Computer Society Workshop on VLSI, 2001
3. Atul Katoch, Evert Seevinck and Harry Veendrick, "Fast signal propagation for point to point on-chip long interconnects using current sensing," ESSCIRC'02, Sep. 2002.
4. Evert Seevinck, P. J. van Beers and H. Ontrop, "Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's," IEEE Journal of Solid State Circuits, vol. 26, no. 4, pp. 525-536, April 1991.
5. Hui Zang, Varghese George and Jan M. Rabaey, "Low swing on-chip signaling techniques: effectiveness and robustness," IEEE Trans. on VLSI systems, vol. 8, no. 3, pp. 264-272, June 2000.
6. Chang-Ki Kwon, K. Rho and K. Lee, "High speed and low swing interface circuits using dynamic over-driving and adaptive sensing scheme," 6th Intl. Conference on VLSI and CAD, pp. 388-391, 1999.
7. Kangmin Lee et al., "A 51mW 1.6GHz On-Chip Network for Low- Power Heterogeneous SoC Platform," ISSCC, pp. 152-153, 2004. 4141