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Volumn , Issue CIRCUITS SYMP., 2004, Pages 348-351

Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver

Author keywords

Adaptive equalization; Data recovery; DFE; Link

Indexed keywords

ALGORITHMS; BIT ERROR RATE; CALIBRATION; DATA REDUCTION; EQUALIZERS; HARDWARE; INTERSYMBOL INTERFERENCE;

EID: 4544337869     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (55)

References (9)
  • 1
    • 0037969368 scopus 로고    scopus 로고
    • Equalization and clock recovery for a 2.5-10Gb/s 2-PAM/4-PAM backplane transceiver cell
    • Feb. San Francisco
    • J. Zerbe et al, "Equalization and Clock Recovery for a 2.5-10Gb/s 2-PAM/4-PAM Backplane Transceiver Cell," IEEE International Solid-State Circuits Conference, Feb. 2003, San Francisco.
    • (2003) IEEE International Solid-state Circuits Conference
    • Zerbe, J.1
  • 2
    • 0026171346 scopus 로고
    • Techniques for high-speed implementation of nonlinear cancellation
    • Jun
    • S. Kasturia and J.H. Winters, "Techniques for high-speed implementation of nonlinear cancellation," IEEE J. Selected Areas in Communications, vol 9, no. 5, Jun 1991, pp. 711-717.
    • (1991) IEEE J. Selected Areas in Communications , vol.9 , Issue.5 , pp. 711-717
    • Kasturia, S.1    Winters, J.H.2
  • 3
    • 0037344322 scopus 로고    scopus 로고
    • An adaptive pam-4 5-Gb/s backplane transceiver in 0.25-μm CMOS
    • March
    • J.T. Stonick et al, "An adaptive pam-4 5-Gb/s backplane transceiver in 0.25-μm CMOS," IEEE J. Solid-State Circuits, vol. 38, no. 3, March 2003, pp. 436-443.
    • (2003) IEEE J. Solid-state Circuits , vol.38 , Issue.3 , pp. 436-443
    • Stonick, J.T.1
  • 5
    • 0035335623 scopus 로고    scopus 로고
    • 1.6Gb/s/pin 4-PAM signaling and circuits for a multidrop bus
    • May
    • J. L. Zerbe et al, "1.6Gb/s/pin 4-PAM signaling and circuits for a multidrop bus," IEEE J. Solid-State Circuits, vol. 35, May 2001, pp.752-760
    • (2001) IEEE J. Solid-state Circuits , vol.35 , pp. 752-760
    • Zerbe, J.L.1
  • 6
    • 4544319049 scopus 로고    scopus 로고
    • A 2.2Gbps CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation
    • September
    • Y-S. Sohn et al, "A 2.2Gbps CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation," IEEE Custom Integrated Circuits Conference, September 2003
    • (2003) IEEE Custom Integrated Circuits Conference
    • Sohn, Y.-S.1
  • 7
    • 0016987049 scopus 로고
    • Stationary and nonstationary learning characteristics of the LMS adaptive filter
    • B. Widrow et al, "Stationary and nonstationary learning characteristics of the LMS adaptive filter," Proc. IEEE, vol. 64, no. 8, pp. 1151-1162, 1976.
    • (1976) Proc. IEEE , vol.64 , Issue.8 , pp. 1151-1162
    • Widrow, B.1
  • 9
    • 0026896334 scopus 로고
    • Adaptive nonlinear cancellation for high-speed fiber-optic systems
    • July
    • J.H. Winters and S. Kasturia, "Adaptive nonlinear cancellation for high-speed fiber-optic systems," IEEE J. of Lightwave Technology, vol 10, no. 7, July 1992, pp. 971-977.
    • (1992) IEEE J. of Lightwave Technology , vol.10 , Issue.7 , pp. 971-977
    • Winters, J.H.1    Kasturia, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.