Chip multiprocessor design space exploration through statistical simulation

IEEE Transactions on Computers

Volumn 58, Issue 12, 2009, Pages 1668-1681

  Genbrugge, Davy ^a   Eeckhout, Lieven ^a  

^a GHENT UNIVERSITY   (Belgium)

Author keywords

Performance of systems (modeling techniques; Simulation).

Indexed keywords

AVERAGE PREDICTION ERROR; CHIP MULTIPROCESSOR; CHIP MULTIPROCESSORS; DESIGN CYCLE; DESIGN POINTS; DESIGN SPACE EXPLORATION; EXPERIMENTAL EVALUATION; FAST SIMULATION; MEMORY ADDRESS; MEMORY HIERARCHY; MICRO ARCHITECTURES; MODELING TECHNIQUE; MULTIPLE PROGRAM; PERFORMANCE OF SYSTEMS; PROGRAM EXECUTION; RESOURCE CONFLICT; SHARED RESOURCES; SIMULATION SPEED-UP; STATISTICAL SIMULATION; TIME VARYING;

DESIGN; MICROPROCESSOR CHIPS; NANOTECHNOLOGY; SPACE RESEARCH; SYSTEMS ANALYSIS; WEB SERVICES;

MULTIPROCESSING SYSTEMS;

EID: 74549142310     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2009.77     Document Type: Article

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