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Volumn , Issue 2008 PROCEEDINGS, 2008, Pages 270-281

CPR: Composable performance regression for scalable multiprocessor models

Author keywords

[No Author keywords available]

Indexed keywords

BASE-LINE PERFORMANCE; MEDIAN ERRORS; MODEL OUTPUTS; MULTIPROCESSOR SIMULATION; MULTIPROCESSOR SIMULATORS; NUMBER OF CYCLES; PRODUCTION QUALITY; RESOURCE UTILIZATIONS; SHARED RESOURCES; UNIPROCESSOR;

EID: 66749185800     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2008.4771797     Document Type: Conference Paper
Times cited : (70)

References (15)
  • 1
    • 33846698814 scopus 로고    scopus 로고
    • An efficient, practical paral-lelization methodology for multicore architecture simulation
    • August
    • J. Donald and M. Martonosi, "An efficient, practical paral-lelization methodology for multicore architecture simulation," IEEE Computer Architecture Letters, August 2006.
    • (2006) IEEE Computer Architecture Letters
    • Donald, J.1    Martonosi, M.2
  • 9
    • 66749147278 scopus 로고    scopus 로고
    • PCMark04, Futuremark Corporation.
    • PCMark04, Futuremark Corporation.
  • 10
    • 78049526435 scopus 로고    scopus 로고
    • Standard Performance Evaluation Corporation
    • SPECweb99, Standard Performance Evaluation Corporation.
    • SPECweb99
  • 13
    • 66749096676 scopus 로고    scopus 로고
    • Intel architecture and silicon cadence: The catalyst for industry innovation
    • October
    • S. Shenoy and A. Daniel, "Intel architecture and silicon cadence: The catalyst for industry innovation," Technology at Intel Magazine, October 2006.
    • (2006) Technology at Intel Magazine
    • Shenoy, S.1    Daniel, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.