Exploring serial vertical interconnects for 3D ICs

Proceedings - Design Automation Conference

Volumn , Issue , 2009, Pages 581-586

  Pasricha, Sudeep ^a  

^a Engineering Research Center and Hydraulics Laboratory   (United States)

Author keywords

3D ICs; Networks on chip; Serial interconnect; VLSI

Indexed keywords

COMPUTER AIDED DESIGN; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT INTERCONNECTS; NETWORK-ON-CHIP; TIMING CIRCUITS; TRAFFIC CONGESTION;

3-D ICS; INTER-CORE COMMUNICATIONS; LOWER PEAK TEMPERATURES; NETWORKS ON CHIPS; ON CHIP COMMUNICATION; SERIAL INTERCONNECT; THROUGH-SILICON-VIA (TSV); VLSI;

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 70350712431     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1629911.1630061     Document Type: Conference Paper

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