3D floorplanning with thermal vias

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Wong, Eric ^a   Lim, Sung Kyu ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEVICE DENSITY; FLOORPLANNING STAGES; RANDOM WALK TECHNIQUES; THERMAL VIAS;

ALGORITHMS; DELAY CIRCUITS; PROBLEM SOLVING; RANDOM PROCESSES;

LOGIC CIRCUITS;

EID: 34047110813     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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