Thermal-aware mapping and placement for 3-D NoC designs

Proceedings - IEEE International SOC Conference

Volumn , Issue , 2005, Pages 25-28

  Addo Quaye, Charles ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GENETIC ALGORITHMS; INTERCONNECTION NETWORKS; THREE DIMENSIONAL;

NETWORKS ON CHIP (NOC); POWER DENSITY; SYSTEM TEMPERATURES; SYSTEMS-ON-CHIP;

INTEGRATED CIRCUIT LAYOUT;

EID: 30844469068     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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