메뉴 건너뛰기




Volumn , Issue , 2009, Pages 250-261

Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches

Author keywords

Cache capacity allocation; Data page migration; Last level caches; Non uniform cache architectures (NUCA); Page coloring; Shadow memory addresses

Indexed keywords

BUFFER STORAGE; MEMORY ARCHITECTURE; MULTIPROGRAMMING;

EID: 64949140362     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2009.4798260     Document Type: Conference Paper
Times cited : (65)

References (42)
  • 2
    • 34548008288 scopus 로고    scopus 로고
    • ASR: Adaptive Selective Replication for CMP Caches
    • December
    • B. Beckmann, M. Marty, and D. Wood. ASR: Adaptive Selective Replication for CMP Caches. In Proceedings of MICRO-39, December 2006.
    • (2006) Proceedings of MICRO-39
    • Beckmann, B.1    Marty, M.2    Wood, D.3
  • 3
    • 21644472427 scopus 로고    scopus 로고
    • Managing Wire Delay in Large Chip-Multiprocessor Caches
    • December
    • B. Beckmann and D.Wood. Managing Wire Delay in Large Chip-Multiprocessor Caches. In Proceedings of MICRO-37, December 2004.
    • (2004) Proceedings of MICRO-37
    • Beckmann, B.1    Wood, D.2
  • 4
    • 51549095074 scopus 로고    scopus 로고
    • The PARSEC Benchmark Suite: Characterization and Architectural Implications
    • Technical report
    • C. Benia, S. Kumar, J. P. Singh, and K. Li. The PARSEC Benchmark Suite: Characterization and Architectural Implications. Technical report, 2008.
    • (2008)
    • Benia, C.1    Kumar, S.2    Singh, J.P.3    Li, K.4
  • 7
    • 33845903561 scopus 로고    scopus 로고
    • Co-Operative Caching for Chip Multiprocessors
    • June
    • J. Chang and G. Sohi. Co-Operative Caching for Chip Multiprocessors. In Proceedings of ISCA-33, June 2006.
    • (2006) Proceedings of ISCA-33
    • Chang, J.1    Sohi, G.2
  • 8
    • 64949190009 scopus 로고    scopus 로고
    • PageNUCA: Selected Policies for Page-grain Locality Management in Large Shared Chip- Multiprocessor Caches
    • M. Chaudhuri. PageNUCA: Selected Policies for Page-grain Locality Management in Large Shared Chip- Multiprocessor Caches. In Proceedings of HPCA-15, 2009.
    • (2009) Proceedings of HPCA-15
    • Chaudhuri, M.1
  • 9
    • 84944411840 scopus 로고    scopus 로고
    • Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures
    • December
    • Z. Chishti, M. Powell, and T. Vijaykumar. Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures. In Proceedings of MICRO-36, December 2003.
    • (2003) Proceedings of MICRO-36
    • Chishti, Z.1    Powell, M.2    Vijaykumar, T.3
  • 10
    • 27544432313 scopus 로고    scopus 로고
    • Optimizing Replication, Communication, and Capacity Allocation in CMPs
    • June
    • Z. Chishti, M. Powell, and T. Vijaykumar. Optimizing Replication, Communication, and Capacity Allocation in CMPs. In Proceedings of ISCA-32, June 2005.
    • (2005) Proceedings of ISCA-32
    • Chishti, Z.1    Powell, M.2    Vijaykumar, T.3
  • 11
    • 40349095122 scopus 로고    scopus 로고
    • Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
    • December
    • S. Cho and L. Jin. Managing Distributed, Shared L2 Caches through OS-Level Page Allocation. In Proceedings of MICRO-39, December 2006.
    • (2006) Proceedings of MICRO-39
    • Cho, S.1    Jin, L.2
  • 14
    • 34547670591 scopus 로고    scopus 로고
    • An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors
    • February
    • H. Dybdahl and P. Stenstrom. An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors. In Proceedings of HPCA-13, February 2007.
    • (2007) Proceedings of HPCA-13
    • Dybdahl, H.1    Stenstrom, P.2
  • 15
    • 0030704381 scopus 로고    scopus 로고
    • Reactive NUMA: A Design for Unifying S-COMA and cc-NUMA
    • B. Falsafi and D. Wood. Reactive NUMA: A Design for Unifying S-COMA and cc-NUMA. In Proceedings of ISCA-24, 1997.
    • (1997) Proceedings of ISCA-24
    • Falsafi, B.1    Wood, D.2
  • 17
    • 0032630821 scopus 로고    scopus 로고
    • Ultra SPARC III: Designing Third Generation 64-Bit Performance
    • May/June
    • T. Horel and G. Lauterbach. Ultra SPARC III: Designing Third Generation 64-Bit Performance. IEEE Micro, 19(3), May/June 1999.
    • (1999) IEEE Micro , vol.19 , Issue.3
    • Horel, T.1    Lauterbach, G.2
  • 18
    • 32844471317 scopus 로고    scopus 로고
    • J. Huh, C. Kim, H. Shafi, L. Zhang, D. Burger, and S. Keckler. A NUCA Substrate for Flexible CMP Cache Sharing. In Proceedings of ICS-19, June 2005.
    • J. Huh, C. Kim, H. Shafi, L. Zhang, D. Burger, and S. Keckler. A NUCA Substrate for Flexible CMP Cache Sharing. In Proceedings of ICS-19, June 2005.
  • 20
    • 34547657571 scopus 로고    scopus 로고
    • A Domain-Specific On- Chip Network Design for Large Scale Cache Systems
    • February
    • Y. Jin, E. J. Kim, and K. H. Yum. A Domain-Specific On- Chip Network Design for Large Scale Cache Systems. In Proceedings of HPCA-13, February 2007.
    • (2007) Proceedings of HPCA-13
    • Jin, Y.1    Kim, E.J.2    Yum, K.H.3
  • 21
    • 84976736383 scopus 로고
    • Page Placement Algorithms for Large Real-Indexed Caches
    • 10(4):338?359
    • R. E. Kessler and M. D. Hill. Page Placement Algorithms for Large Real-Indexed Caches. ACM Trans. Comput. Syst., 10(4):338?359, 1992.
    • (1992) ACM Trans. Comput. Syst
    • Kessler, R.E.1    Hill, M.D.2
  • 22
    • 0036949388 scopus 로고    scopus 로고
    • An Adaptive, Non-Uniform Cache Structure for Wire-Dominated On-Chip Caches
    • October
    • C. Kim, D. Burger, and S. Keckler. An Adaptive, Non-Uniform Cache Structure for Wire-Dominated On-Chip Caches. In Proceedings of ASPLOS-X, October 2002.
    • (2002) Proceedings of ASPLOS-X
    • Kim, C.1    Burger, D.2    Keckler, S.3
  • 24
    • 64949143288 scopus 로고
    • Experimental comparison of memory management policies for numa multiprocessors
    • Technical report, Durham, NC, USA
    • P. R. LaRowe and S. C. Ellis. Experimental comparison of memory management policies for numa multiprocessors. Technical report, Durham, NC, USA, 1990.
    • (1990)
    • LaRowe, P.R.1    Ellis, S.C.2
  • 25
    • 57749186047 scopus 로고    scopus 로고
    • Gaining Insights into Multicore Cache Partitioning: Bridging the Gap between Simulation and Real Systems
    • February
    • J. Lin, Q. Lu, X. Ding, Z. Zhang, X. Zhang, and P. Sadayappan. Gaining Insights into Multicore Cache Partitioning: Bridging the Gap between Simulation and Real Systems. In Proceedings of HPCA-14, February 2008.
    • (2008) Proceedings of HPCA-14
    • Lin, J.1    Lu, Q.2    Ding, X.3    Zhang, Z.4    Zhang, X.5    Sadayappan, P.6
  • 27
    • 0035511103 scopus 로고    scopus 로고
    • Improving Performance of Large Physically Indexed Caches by Decoupling Memory Addresses from Cache Addresses
    • 50(11):1191?1201
    • R. Min and Y. Hu. Improving Performance of Large Physically Indexed Caches by Decoupling Memory Addresses from Cache Addresses. IEEE Trans. Comput., 50(11):1191?1201, 2001.
    • (2001) IEEE Trans. Comput
    • Min, R.1    Hu, Y.2
  • 29
    • 34548042910 scopus 로고    scopus 로고
    • Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches
    • December
    • M. Qureshi and Y. Patt. Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches. In Proceedings of MICRO-39, December 2006.
    • (2006) Proceedings of MICRO-39
    • Qureshi, M.1    Patt, Y.2
  • 30
    • 34247108325 scopus 로고    scopus 로고
    • Architectural support for operating system-driven CMP cache management
    • September
    • N. Rafique,W. Lim, and M. Thottethodi. Architectural support for operating system-driven CMP cache management. In Proceedings of PACT-2006, September 2006.
    • (2006) Proceedings of PACT-2006
    • Rafique, N.1    Lim, W.2    Thottethodi, M.3
  • 32
    • 78149251349 scopus 로고
    • Exploiting operating system support for dynamic page placement on a numa shared memory multiprocessor
    • J. Richard P. LaRowe, J. T.Wilkes, and C. S. Ellis. Exploiting operating system support for dynamic page placement on a numa shared memory multiprocessor. In Proceedings of PPOPP, 1991.
    • (1991) Proceedings of PPOPP
    • Richard, J.1    LaRowe, P.2    Wilkes, J.T.3    Ellis, C.S.4
  • 34
    • 27544498313 scopus 로고    scopus 로고
    • Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
    • E. Speight, H. Shafi, L. Zhang, and R. Rajamony. Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors. In Proceedings of ISCA-32, 2005.
    • (2005) Proceedings of ISCA-32
    • Speight, E.1    Shafi, H.2    Zhang, L.3    Rajamony, R.4
  • 35
    • 1642371317 scopus 로고    scopus 로고
    • Dynamic Partitioning of Shared Cache Memory
    • 28(1):7?26
    • G. E. Suh, L. Rudolph, and S. Devadas. Dynamic Partitioning of Shared Cache Memory. J. Supercomput., 28(1):7?26, 2004.
    • (2004) J. Supercomput
    • Suh, G.E.1    Rudolph, L.2    Devadas, S.3
  • 39
    • 17044405973 scopus 로고    scopus 로고
    • Operating System Support for Improving Data Locality on CC-NUMA Compute Servers
    • B. Verghese, S. Devine, A. Gupta, and M. Rosenblum. Operating System Support for Improving Data Locality on CC-NUMA Compute Servers. SIGPLAN Not., 31(9):279-289, 1996.
    • (1996) SIGPLAN Not , vol.31 , Issue.9 , pp. 279-289
    • Verghese, B.1    Devine, S.2    Gupta, A.3    Rosenblum, M.4
  • 40
    • 0037225560 scopus 로고    scopus 로고
    • A Power Model for Routers: Modeling Alpha 21364 and InfiniBand Routers
    • January
    • H. S. Wang, L. S. Peh, and S. Malik. A Power Model for Routers: Modeling Alpha 21364 and InfiniBand Routers. In IEEE Micro, Vol 24, No 1, January 2003.
    • (2003) IEEE Micro , vol.24 , Issue.1
    • Wang, H.S.1    Peh, L.S.2    Malik, S.3
  • 41
    • 0029179077 scopus 로고
    • The SPLASH-2 Programs: Characterization and Methodological Considerations
    • June
    • S. Woo, M. Ohara, E. Torrie, J. Singh, and A. Gupta. The SPLASH-2 Programs: Characterization and Methodological Considerations. In Proceedings of ISCA-22, pages 24-36, June 1995.
    • (1995) Proceedings of ISCA-22 , pp. 24-36
    • Woo, S.1    Ohara, M.2    Torrie, E.3    Singh, J.4    Gupta, A.5
  • 42
    • 27544495466 scopus 로고    scopus 로고
    • Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors
    • June
    • M. Zhang and K. Asanovic. Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. In Proceedings of ISCA-32, June 2005.
    • (2005) Proceedings of ISCA-32
    • Zhang, M.1    Asanovic, K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.