Page migration with dynamic space-sharing scheduling policies: The case of the SGI O2000

International Journal of Parallel Programming

Volumn 32, Issue 4 SPEC. ISS., 2004, Pages 263-288

  Corbalan, Julita ^a   Martorell, Xavier ^a   Labarta, Jesus ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

CC NUMA; Dynamic processor allocation policy; Memory page migration; Multiprogrammed workload; OpenMP

Indexed keywords

ALLOCATION POLICY; CC-NUMA; DYNAMIC PROCESSOR; MEMORY PAGE MIGRATION;

COMPUTER ARCHITECTURE; DYNAMIC PROGRAMMING; INTERCONNECTION NETWORKS; MULTIPROGRAMMING; RANDOM ACCESS STORAGE; STORAGE ALLOCATION (COMPUTER);

PARALLEL PROCESSING SYSTEMS;

EID: 3543054682     PISSN: 08857458     EISSN: None     Source Type: Journal    
DOI: 10.1023/B:IJPP.0000035815.13969.ec     Document Type: Conference Paper

References (21)

1. J. Laudon and D. Lenoski, The SGI Origin: A ccNUMA Highly Scalable Server, Proceedings of the 24th International Symposium on Computer Architecture, pp. 241-251 (1997).
2. M. Marchetti, L. Kontothanassis, R. Bianchini, and M. L. Scott, Using Simple Page Placement Policies to Reduce the Cost of Cache Fills in Coherent Shared-Memory Systems, Proceedings of the 9th International Parallel Processing Symposium, Santa Barbara, CA, pp. 480-485 (April 1995).
3. OpenMP Organization. OpenMP Fortran Application Interface, v. 2.0, (June 2000). http://www.openmp.org.
4. NANOS ESPRIT Project (E-21907), http://www.ac.upc.es/nanos.
5. Xavier Martorell, Dynamic Scheduling of Parallel Applications on Shared-Memory Multiprocessors, Ph.D. thesis, Universitat Politècnica de Catalunya (1999). http://www.ac.upc.es/homes/xavim/dynsched.pdf.
6. T. Brecht, On the Importance of Parallel Application Placement in NUMA Multiprocessors, Proceedings of the Symposium Experiences with Distributed and Multiprocessor Systems (SEDMSIV), San Diego, CA (September 1993).
7. D. Jiang and J. P. Singh, Scaling Application Performance on a Cache-Coherent Multiprocessor, Proceedings of the 26th International Symposium on Computer Architecture, Atlanta, USA, pp. 305-316 (1999).
8. D. S. Nikolopoulos, T. S. Papatheodorou, C. D. Polychronopoulos, J. Labarta, and Eduard Ayguadé, User-Level Dynamic Page Migration for Multiprogrammed Shared-Memory Multiprocessors, Proceedings of the 30th Annual International Conference on Parallel Processing (ICPP '00), Vancouver, Canada, pp. 95-103 (August 2000).
9. R. Chandra, S. Devine, B. Verghese, A. Gupta, and M. Rosenblum, Scheduling and Page Migration for Multiprocessor Compute Servers, Proceedings of Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (October 1994).
10. Silicon Graphics, Inc. IRIX6.5 Online Manual Pages, mld(3), mldset(3) and mmci(5) - memory locality domain operations and memory management control interface, (2000).
11. Silicon Graphics, Inc. Origin2000 and Onyx2 Performance Tuning and Optimization Guide, Document number 007-3430-002, (2000) http://techpubs.sgi. com.
12. Julita Corbalán, Coordinated Scheduling and Dynamic Performance Analysis in Multiprocessor Systems, Ph.D. Thesis, Universitat Politecnica de Catalunya (2002). http://people.ac.upc.es/juli/thesis.pdf.
13. C. McCann, R. Vaswani, and J. Zahorjan, A Dynamic Processor Allocation Policy for Multiprogrammed Shared-Memory Multiprocessors, ACM Transactions on Computer Systems, 11(2):146-178 (May 1993).
14. J. Corbalán, X. Martorell, and J. Labarta, Performance-Driven Processor Allocation, Proceedings of the 4th Operating System Design and Implementation (OSDI 2000), San Diego, California, USA, pp. 59-71 (October 2000).
15. Felix Freitag, Julita Corbalán, and Jesús Labarta, A Dynamic Periodicity Detector: Application to Speedup Computation, Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2001), San Francisco, (April 23-27, 2001).
16. Standard Performance Evaluation Corporation. SPEC CPU95 Benchmarks (1995). Available at http://www.spec.org/osg/cpu95.
17. H. Jin, M. Frumkin, and J. Yan. The OpenMP Implementation of NAS Parallel Benchmarks and Its Performance Technical Report NAS-99-011 (1999).
18. The Standard Workload Format, http://www.cs.huji.ac.il/labs/parallel/ workload/swf.html.
19. European Center for Parallelism of Barcelona (CEPBA), Paraver - Parallel Program Visualization and Analysis Tool - Reference Manual, (November 2000). http://www.cep-ba.upc.es/paraver.
20. D. Bailey, T. Harris, W. Saphir, R. Wijngaart, A. Woo, and M. Yarrow, The NAS Parallel Benchmarks 2.0, Technical Report NAS-95-020, NASA (December 1995).
21. Silicon Graphics, Inc. IRIX6.5 Online Manual Pages, cpuset, miser_cpus(4), miser(1,4,5) - define and manage set of CPUs and Miser resource manager, (2000).