A power model for routers: Modeling alpha 21364 and InfiniBand routers

IEEE Micro

Volumn 23, Issue 1, 2003, Pages 26-35

  Wang, Hang Sheng ^a   Peh, Li Shiuan ^a,b   Malik, Sharad ^a  

^a Princeton University   (United States)

^b PRINCETON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CROSSBAR EQUIPMENT; MICROPROCESSOR CHIPS; ROUTERS;

POWER ESTIMATION;

INTERCONNECTION NETWORKS;

EID: 0037225560     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2003.1179895     Document Type: Article

References (12)

1. N.J. Boden et al., "Myrinet: A Gigabit-per-Second Local Area Network," IEEE Micro, vol. 15, No. 1, Feb. 1995, pp. 29-36.
2. W. Dally, P. Carvey, and L. Dennison, "The Avici Terabit Switch/Router," http://www.avici.com
3. Mellanox Technologies Inc., "Mellanox Performance, Price, Power, Volume Metric (PPPV)," http://www.mellanox.com/products/shared/PPPV.pdf.
4. M.B. Taylor et al., "The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs," IEEE Micro, vol. 22, no. 2, Mar.-Apr. 2002, pp. 25-35.
5. S.S. Mukherjee et al., "The Alpha 21364 Network Architecture," IEEE Micro, vol. 22, No. 1, Jan.-Feb. 2002, pp. 26-35.
6. D. Brooks, V. Tiwari, and M. Martonosi, "Wattch: A Framework for Architectural-Level Power Analysis and Optimizations," Proc. Int'l Symp. Computer Architecture (ISCA 00), ACM Press, 2000, pp. 83-94.
7. C.S. Patel et al., "Power Constrained Design of Multiprocessor Interconnection Networks, " Proc. Int'l Conf. Computer Design (ICCD 97), IEEE CS Press, 1997, pp. 408-416.
8. A.G. Wassal and M.A. Hasan, "Low-Power System-Level Design of VLSI Packet Switching Fabrics," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 20, no.6, June 2001, pp. 723-738.
9. G. Essakimuthu, N. Vijaykrishnan, and M.J. Irwin, An Analytical Power Estimation Model for Crossbar Interconnects, tech. report CSE-02-009, Dept. of Computer Science and Engineering, Penn State Univ., University Park, Pa., 2002.
10. L. Shang, L.-S. Peh, and N.K. Jha "Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks," Proc. 9th Int'l Symp. High-Performance Computer Architecture (HPCA), IEEE CS Press, 2003.
11. M.B. Kamble and K. Ghose, "Analytical Energy Dissipation Models for Low-Power Caches," Proc. Int'l Symp. Low Power Electronics and Design (ISPLED 97), ACM Press, 1997, pp. 143-148.
12. IBM. "IBM InfiniBand 8-port 12x Switch," http://www-3.ibm.com/chips/products/infini-band/ (now protected)