-
1
-
-
0042697357
-
-
K. Roy, S. Mukhopadhyay, and H. Meimand-Mehmoodi, Leakage current mechanisms and leakage reduction techniques in deep-submicron CMOS circuits, Proc. IEEE, no. 2, pp. 305-327, Feb. 2003.
-
K. Roy, S. Mukhopadhyay, and H. Meimand-Mehmoodi, "Leakage current mechanisms and leakage reduction techniques in deep-submicron CMOS circuits," Proc. IEEE, vol. ???, no. 2, pp. 305-327, Feb. 2003.
-
-
-
-
2
-
-
0004001454
-
Technology trends and design challenges for microprocessor design
-
Sep. 22-24
-
S. Borkar, "Technology trends and design challenges for microprocessor design," in Proc. 24th Eur. Solid-State Circuits Conf. (ESSCIRC'98) 1998, Sep. 22-24, 1998, pp. 7-8.
-
(1998)
Proc. 24th Eur. Solid-State Circuits Conf. (ESSCIRC'98)
, pp. 7-8
-
-
Borkar, S.1
-
3
-
-
0036732499
-
Leakage and process variation effects in current testing on future CMOS circuits
-
Sept.-Oct
-
A. Keshavarzi, J. W. Tschanz, S. Narendra, V. De, W. R. Daasch, K. Roy, M. Sachdev, and C. F. Hawkins, "Leakage and process variation effects in current testing on future CMOS circuits," IEEE Design Test Comput., vol. 19, no. 5, pp. 36-43, Sept.-Oct. 2002.
-
(2002)
IEEE Design Test Comput
, vol.19
, Issue.5
, pp. 36-43
-
-
Keshavarzi, A.1
Tschanz, J.W.2
Narendra, S.3
De, V.4
Daasch, W.R.5
Roy, K.6
Sachdev, M.7
Hawkins, C.F.8
-
4
-
-
29044440093
-
FinFET-a self-aligned double-gate MOSFET scalable to 20 nm
-
Dec
-
D. Hisamoto, W.-C. Lee, J. Kedzierski, H. Takeuchi, K. Asano, C. Kuo, E. Anderson, T.-A. King, J. Bokor, and C. Hu, "FinFET-a self-aligned double-gate MOSFET scalable to 20 nm," IEEE Trans. Electron Devices vol. 47, no. 12, pp. 2320-2325, Dec. 2000.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, Issue.12
, pp. 2320-2325
-
-
Hisamoto, D.1
Lee, W.-C.2
Kedzierski, J.3
Takeuchi, H.4
Asano, K.5
Kuo, C.6
Anderson, E.7
King, T.-A.8
Bokor, J.9
Hu, C.10
-
5
-
-
0141761518
-
Tri-Gate fully-depleted CMOS transistors: Fabrication, design and layout
-
Jun
-
B. Doyle, B. Boyanov, S. Datta, M. Doczy, S. Hareland, B. Jin, J. Kavalieros, T. Linton, R. Rios, and R. Chau, "Tri-Gate fully-depleted CMOS transistors: Fabrication, design and layout," in Dig. Tech. Papers VLSI Technol. Symp., Jun. 2003, pp. 133-134.
-
(2003)
Dig. Tech. Papers VLSI Technol. Symp
, pp. 133-134
-
-
Doyle, B.1
Boyanov, B.2
Datta, S.3
Doczy, M.4
Hareland, S.5
Jin, B.6
Kavalieros, J.7
Linton, T.8
Rios, R.9
Chau, R.10
-
6
-
-
8344236776
-
A 90-nm logic technology featuring strained-silicon
-
Nov
-
S. Thompson, M. Armstrong, C. Auth, M. Alavi, M. Buehler, R. Chau, S. Cea, T. Ghani, G. Glass, T. Hoffman, C.-H. Jan, C. Kenyon, J. Klaus, K. Kuhn, Z. Ma, B. Mcintyre, K. Mistry, A. Murthy, B. Obradovic, R. Nagisetty, P. Nguyen, S. Sivakumar, R. Shaheed, L. Shifren, B. Tufts, S. Tyagi, M. Bohr, and Y. El-Mansy, "A 90-nm logic technology featuring strained-silicon," IEEE Trans. Electron Devices, vol. 51, no. 11, pp. 1790-1797, Nov. 2004.
-
(2004)
IEEE Trans. Electron Devices
, vol.51
, Issue.11
, pp. 1790-1797
-
-
Thompson, S.1
Armstrong, M.2
Auth, C.3
Alavi, M.4
Buehler, M.5
Chau, R.6
Cea, S.7
Ghani, T.8
Glass, G.9
Hoffman, T.10
Jan, C.-H.11
Kenyon, C.12
Klaus, J.13
Kuhn, K.14
Ma, Z.15
Mcintyre, B.16
Mistry, K.17
Murthy, A.18
Obradovic, B.19
Nagisetty, R.20
Nguyen, P.21
Sivakumar, S.22
Shaheed, R.23
Shifren, L.24
Tufts, B.25
Tyagi, S.26
Bohr, M.27
El-Mansy, Y.28
more..
-
7
-
-
33750585580
-
85-nm gate length enhancement and depletion mode InSb Quantum well transistors for ultra high speed and very low-power digital logic applications
-
Dec
-
S. Datta, T. Ashley, R. Chau, K. Hilton, R. Jefferies, T. Martin, and T. Phillips, "85-nm gate length enhancement and depletion mode InSb Quantum well transistors for ultra high speed and very low-power digital logic applications," in Tech. Dig. Int. Electron Device Meeting, Dec. 2005, pp. 783-786.
-
(2005)
Tech. Dig. Int. Electron Device Meeting
, pp. 783-786
-
-
Datta, S.1
Ashley, T.2
Chau, R.3
Hilton, K.4
Jefferies, R.5
Martin, T.6
Phillips, T.7
-
8
-
-
21244484984
-
Single-walled carbon nanotube electronics
-
Mar
-
P. L. McEuen, M. S. Fuhrer, and H. Park, "Single-walled carbon nanotube electronics," IEEE Trans. Nanotechnology, vol. 1, pp. 78-85, Mar. 2002.
-
(2002)
IEEE Trans. Nanotechnology
, vol.1
, pp. 78-85
-
-
McEuen, P.L.1
Fuhrer, M.S.2
Park, H.3
-
9
-
-
85008053970
-
Supertubes [carbon anotubes]
-
Aug
-
P. Avouris, "Supertubes [carbon anotubes]," IEEE Spectrum, vol. 41, no. 8, pp. 40-45, Aug. 2004.
-
(2004)
IEEE Spectrum
, vol.41
, Issue.8
, pp. 40-45
-
-
Avouris, P.1
-
10
-
-
0036923555
-
Carbon nanotube electronics
-
Dec
-
P. Avouris, J. Appenzeller, V. Derycke, R. Martel, and S. Wind, "Carbon nanotube electronics," in Dig. Int. Electron Deviced Meetinh, Dec. 2002, pp. 281-284.
-
(2002)
Dig. Int. Electron Deviced Meetinh
, pp. 281-284
-
-
Avouris, P.1
Appenzeller, J.2
Derycke, V.3
Martel, R.4
Wind, S.5
-
11
-
-
0141769693
-
Carbon nanotube inter- and intramolecular logic gates
-
V. Derycke, R. Martel, J. Appenzeller, and P. Avouris, "Carbon nanotube inter- and intramolecular logic gates," Nano Lett., vol. 1, no. 9, pp. 453-456.
-
Nano Lett
, vol.1
, Issue.9
, pp. 453-456
-
-
Derycke, V.1
Martel, R.2
Appenzeller, J.3
Avouris, P.4
-
12
-
-
0035834444
-
Logic circuits with carbon nanotube transistors
-
A. Bachtold, P. Hadley, T. Nakanishi, and C. Dekker, "Logic circuits with carbon nanotube transistors," Science, vol. 294, pp. 1317-1320, 2001.
-
(2001)
Science
, vol.294
, pp. 1317-1320
-
-
Bachtold, A.1
Hadley, P.2
Nakanishi, T.3
Dekker, C.4
-
13
-
-
0035851465
-
Controlled creation of a carbon nanotube diode by a scanned gate
-
Nov
-
M. Freitag, M. Radosavljevic, Y. Zhou, A. T. Johnson, and W. F. Smith, "Controlled creation of a carbon nanotube diode by a scanned gate," Appl. Phys. Lett., vol. 79, no. 20, pp. 3326-3328, Nov. 2001.
-
(2001)
Appl. Phys. Lett
, vol.79
, Issue.20
, pp. 3326-3328
-
-
Freitag, M.1
Radosavljevic, M.2
Zhou, Y.3
Johnson, A.T.4
Smith, W.F.5
-
14
-
-
0042991275
-
Ballistic carbon nanotube field-effect transistors
-
A. Javey, J. Guo, Q. Wang, M. Lundstrom, and H. Dai, "Ballistic carbon nanotube field-effect transistors," Nature, vol. 427, pp. 654-657, 2003.
-
(2003)
Nature
, vol.427
, pp. 654-657
-
-
Javey, A.1
Guo, J.2
Wang, Q.3
Lundstrom, M.4
Dai, H.5
-
15
-
-
3042798259
-
Multimode transport in Schottky-Barrier carbon-nanotube field-effect transistors
-
Jun
-
J. Appenzeller, J. Knoch, M. Radosavljevi, and P. Avouris, "Multimode transport in Schottky-Barrier carbon-nanotube field-effect transistors," Phys. Rev. Lett., vol. 92, p. 226802, Jun. 2004.
-
(2004)
Phys. Rev. Lett
, vol.92
, pp. 226802
-
-
Appenzeller, J.1
Knoch, J.2
Radosavljevi, M.3
Avouris, P.4
-
16
-
-
0142090023
-
Drain voltage scaling in carbon nanotube transistors
-
M. Radosavljevic, S. Heinze, J. Tersoff, and P. Avouris, "Drain voltage scaling in carbon nanotube transistors," Appl. Phys. Lett., vol. 83, p. 2435, 2003.
-
(2003)
Appl. Phys. Lett
, vol.83
, pp. 2435
-
-
Radosavljevic, M.1
Heinze, S.2
Tersoff, J.3
Avouris, P.4
-
17
-
-
4143096759
-
Self-aligned ballistic molecular transistors and electrically parallel nanotube arrays
-
A. Javey, J. Guo, D. Farmer, Q. Wang, E. Yenilmez, R. Gordon, M. Lundstrom, and H. Dai, "Self-aligned ballistic molecular transistors and electrically parallel nanotube arrays," Nanolett., vol. 4, pp. 1319-1322, 2004.
-
(2004)
Nanolett
, vol.4
, pp. 1319-1322
-
-
Javey, A.1
Guo, J.2
Farmer, D.3
Wang, Q.4
Yenilmez, E.5
Gordon, R.6
Lundstrom, M.7
Dai, H.8
-
18
-
-
18144402418
-
Air-stable chemical doping Of carbon nanotube transistors
-
J. Chen, C. Clinke, A. Afzali, and P. Avouris, "Air-stable chemical doping Of carbon nanotube transistors," in Proc. Device Res. Conf. 2004, pp. 137-138.
-
(2004)
Proc. Device Res. Conf
, pp. 137-138
-
-
Chen, J.1
Clinke, C.2
Afzali, A.3
Avouris, P.4
-
19
-
-
14744272771
-
High-performance n-type carbon nanotube field-effect transistors with chemically doped contacts
-
A. Javey, R. Tu, D. B. Farmer, J. Guo, R. G. Gordon, and H. Dai, "High-performance n-type carbon nanotube field-effect transistors with chemically doped contacts," Nanolett., vol. 5, no. 2, pp. 345-348, 2005.
-
(2005)
Nanolett
, vol.5
, Issue.2
, pp. 345-348
-
-
Javey, A.1
Tu, R.2
Farmer, D.B.3
Guo, J.4
Gordon, R.G.5
Dai, H.6
-
20
-
-
26644474574
-
High-performance carbon nanotube field-effect transistor with tunable polarities
-
Sep
-
Y.-M. Lin, J. Appenzeller, J. Knoch, and P. Avouris, "High-performance carbon nanotube field-effect transistor with tunable polarities," IEEE Trans. Nanotechnol., vol. 4, no. 5, pp. 481-489, Sep. 2005.
-
(2005)
IEEE Trans. Nanotechnol
, vol.4
, Issue.5
, pp. 481-489
-
-
Lin, Y.-M.1
Appenzeller, J.2
Knoch, J.3
Avouris, P.4
-
21
-
-
5444267155
-
Predicted performance advantages of carbon nanotube transistors with doped nanotubes as source-drain
-
cond-mat/0309039, Sep
-
J. Guo, A. Javey, H. Dai, S. Datta, and M. Lundstrom, "Predicted performance advantages of carbon nanotube transistors with doped nanotubes as source-drain," cond-mat/0309039, Sep. 2003.
-
(2003)
-
-
Guo, J.1
Javey, A.2
Dai, H.3
Datta, S.4
Lundstrom, M.5
-
22
-
-
19744366972
-
Band-to-band tunneling in carbon nanotube field-effect transistors
-
Nov
-
J. Appenzeller, Y.-M. Lin, J. Knoch, and P. Avouris, "Band-to-band tunneling in carbon nanotube field-effect transistors," Phys. Rev. Lett., vol. 93, no. 19, Nov. 2004, 196805.
-
(2004)
Phys. Rev. Lett
, vol.93
, Issue.19
, pp. 196805
-
-
Appenzeller, J.1
Lin, Y.-M.2
Knoch, J.3
Avouris, P.4
-
23
-
-
33847748968
-
Computational study of carbon nanotube p-i-n tunnel FETs
-
Dec
-
S. O. Koswatta, D. E. Nikonov, and M. S. Lundstrom, "Computational study of carbon nanotube p-i-n tunnel FETs," in Tech. Dig. Int. Electron Device Meeting, Dec. 2005, pp. 525-528.
-
(2005)
Tech. Dig. Int. Electron Device Meeting
, pp. 525-528
-
-
Koswatta, S.O.1
Nikonov, D.E.2
Lundstrom, M.S.3
-
24
-
-
26244453976
-
Multi-scale modeling of carbon nanotube transistors
-
J. Guo, S. Datta, M. Lundstrom, and M. P. Anantram, "Multi-scale modeling of carbon nanotube transistors," Int. J. Multiscale Comput. Eng., vol. 2, p. 257, 2004.
-
(2004)
Int. J. Multiscale Comput. Eng
, vol.2
, pp. 257
-
-
Guo, J.1
Datta, S.2
Lundstrom, M.3
Anantram, M.P.4
-
25
-
-
21644440311
-
Performance analysis and design optimization of near ballistic carbon nanotube field-effect transistors
-
Dec
-
J. Guo, A. Javey, H. Dai, and M. Lundstrom, "Performance analysis and design optimization of near ballistic carbon nanotube field-effect transistors," in Dig. Int. Electron Device Meeting, Dec. 2004, pp. 703-706.
-
(2004)
Dig. Int. Electron Device Meeting
, pp. 703-706
-
-
Guo, J.1
Javey, A.2
Dai, H.3
Lundstrom, M.4
-
27
-
-
18644369368
-
Simulating quantum transport in nanoscale MOSFETs: Real versus mode space approaches
-
R. Venugopal, Z. Ren, S. Datta, M. Lundstrom, and D. Jovanovic, "Simulating quantum transport in nanoscale MOSFETs: Real versus mode space approaches," J. Appl. Phys., vol. 92, pp. 3730-3739, 2002.
-
(2002)
J. Appl. Phys
, vol.92
, pp. 3730-3739
-
-
Venugopal, R.1
Ren, Z.2
Datta, S.3
Lundstrom, M.4
Jovanovic, D.5
-
28
-
-
0034291813
-
Nanoscale device modeling: The Green's function method
-
S. Datta, "Nanoscale device modeling: The Green's function method," Superlattices and Microstructures, vol. 28, pp. 253-278, 2000.
-
(2000)
Superlattices and Microstructures
, vol.28
, pp. 253-278
-
-
Datta, S.1
-
29
-
-
0001597428
-
Schottky barrier heights and the continuum of gap states
-
J. Tersoff, "Schottky barrier heights and the continuum of gap states," Phys. Rev. Lett., vol. 52, pp. 465-568, 1984.
-
(1984)
Phys. Rev. Lett
, vol.52
, pp. 465-568
-
-
Tersoff, J.1
-
30
-
-
19444361804
-
Mobile ambipolar domain in carbon-nanotube infrared emitters
-
Aug
-
M. Freitag, J. C. Tersoff, J. C. Tsang, Q. Fu, J. Liu, and P. Avouris, "Mobile ambipolar domain in carbon-nanotube infrared emitters," Phys. Rev. Lett., vol. 93, no. 7, Aug. 2004.
-
(2004)
Phys. Rev. Lett
, vol.93
, Issue.7
-
-
Freitag, M.1
Tersoff, J.C.2
Tsang, J.C.3
Fu, Q.4
Liu, J.5
Avouris, P.6
-
31
-
-
20844442624
-
On the role of phonon scattering in carbon nanotube transistors
-
J. Guo and M. Lundstrom, "On the role of phonon scattering in carbon nanotube transistors," Appl. Phys. Lett., vol. 86, p. 193103, 2005.
-
(2005)
Appl. Phys. Lett
, vol.86
, pp. 193103
-
-
Guo, J.1
Lundstrom, M.2
-
32
-
-
0035905567
-
Ambipolar electrical transport in semiconducting single-wall carbon nanotubes
-
Dec
-
R. Martel, V. Derycke, C. Lavoie, J. Appenzeller, K. K. Chan, J. Tersoff, and P. Avouris, "Ambipolar electrical transport in semiconducting single-wall carbon nanotubes," Phys. Rev. Lett., vol. 87, no. 25, p. 256805, Dec. 2001.
-
(2001)
Phys. Rev. Lett
, vol.87
, Issue.25
, pp. 256805
-
-
Martel, R.1
Derycke, V.2
Lavoie, C.3
Appenzeller, J.4
Chan, K.K.5
Tersoff, J.6
Avouris, P.7
-
33
-
-
20344388574
-
-
A. Raychowdhury, J. Guo, K. Roy, and M. Lundstrom, Choice of flat-band voltage, VDD and diameter of ambipolar Schottky-Barrier carbon nanotube transistors in digital circuit design, presented at the Fourth IEEE Nano Conf., Munich, Germany, Aug. 2004, TH-2-2-1, unpublished.
-
A. Raychowdhury, J. Guo, K. Roy, and M. Lundstrom, "Choice of flat-band voltage, VDD and diameter of ambipolar Schottky-Barrier carbon nanotube transistors in digital circuit design," presented at the Fourth IEEE Nano Conf., Munich, Germany, Aug. 2004, TH-2-2-1, unpublished.
-
-
-
-
35
-
-
33750597000
-
Carbon nanotube field-effect transistors for high-performance digital circuits - DC analysis and modeling toward optimum transistor structure
-
Nov
-
A. Raychowdhury et al., "Carbon nanotube field-effect transistors for high-performance digital circuits - DC analysis and modeling toward optimum transistor structure," IEEE Trans. Electron Devices, Nov. 2006.
-
(2006)
IEEE Trans. Electron Devices
-
-
Raychowdhury, A.1
-
36
-
-
33750594849
-
Carbon nanotube field-effect transistors for high-performance digital circuits - Transient analysis, parasictis and scalability
-
Nov
-
A. Keshavarzi et al., "Carbon nanotube field-effect transistors for high-performance digital circuits - Transient analysis, parasictis and scalability," IEEE Trans. Electron Devices, Nov. 2006.
-
(2006)
IEEE Trans. Electron Devices
-
-
Keshavarzi, A.1
-
38
-
-
4544248640
-
Complementary tunneling transistor for low-power application
-
P. F. Wang et al., "Complementary tunneling transistor for low-power application," Solid State Electronics, vol. 48, p. 2281, 2004.
-
(2004)
Solid State Electronics
, vol.48
, pp. 2281
-
-
Wang, P.F.1
-
39
-
-
0024612456
-
Trans on Electron Devices
-
K. K. Yong et al., Trans on Electron Devices, vol. 36, p. 399, 1989.
-
(1989)
, vol.36
, pp. 399
-
-
Yong, K.K.1
-
40
-
-
34247235625
-
Analysis of super cutoff transistors for ultra-low-power digital logic circuits
-
Oct
-
A. Raychowdhury, X. Fong, Q. Chen, and K. Roy, "Analysis of super cutoff transistors for ultra-low-power digital logic circuits," in Proc. Int. Symp. Low Power Electronic Design (ISLPED'06), Oct. 2006, pp. 1-6.
-
(2006)
Proc. Int. Symp. Low Power Electronic Design (ISLPED'06)
, pp. 1-6
-
-
Raychowdhury, A.1
Fong, X.2
Chen, Q.3
Roy, K.4
-
41
-
-
0034867611
-
Scaling of stack effect and its application for leakage reduction
-
S. Narendra, V. De, D. Antoniadis, A. Chandrakasan, and S. Borkar, "Scaling of stack effect and its application for leakage reduction," in Proc. Int. Symp. Low Power Electronic Design (ISLPED'01), 2001.
-
(2001)
Proc. Int. Symp. Low Power Electronic Design (ISLPED'01)
-
-
Narendra, S.1
De, V.2
Antoniadis, D.3
Chandrakasan, A.4
Borkar, S.5
|