81.6 GOPS object recognition processor based on a memory-centric NoC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 17, Issue 3, 2009, Pages 370-383

  Kim, Donghyun ^a   Kim, Kwanho ^a   Kim, Joo Young ^a   Lee, Seungjin ^a   Lee, Se Joong ^a   Yoo, Hoi Jun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Multiprocessing; Network on chip (NoC); Object recognition; VLSI

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK TOPOLOGY; FACE RECOGNITION; OBJECT RECOGNITION; PIPELINES; ROBOT APPLICATIONS; WIRELESS NETWORKS;

CHIP ARCHITECTURES; CMOS TECHNOLOGIES; DATA TRANSACTIONS; DATA-LEVEL PARALLELISMS; HARDWARE FEATURES; MULTIPROCESSING; NETWORK-ON-CHIP (NOC); PERFORMANCE GAINS; POINT LOCALIZATIONS; PROCESSING ELEMENTS; SINGLE INSTRUCTION MULTIPLE DATA INSTRUCTIONS; TARGET APPLICATIONS; TASK EXECUTIONS; VISUAL IMAGE PROCESSING; VLSI;

PIPELINE PROCESSING SYSTEMS;

EID: 63149173107     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2011226     Document Type: Article

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