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Volumn , Issue , 2007, Pages 324-327

Visual image processing RAM for fast 2-D data location search

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER GRAPHICS; DATA STORAGE EQUIPMENT; DIGITAL IMAGE STORAGE; FUZZY LOGIC; IMAGE PROCESSING; IMAGING SYSTEMS; IMAGING TECHNIQUES; MICROPROCESSOR CHIPS; OBJECT RECOGNITION; OPTICAL DATA PROCESSING; RANDOM ACCESS STORAGE;

EID: 44849100688     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430309     Document Type: Conference Paper
Times cited : (2)

References (10)
  • 4
    • 33846236435 scopus 로고    scopus 로고
    • The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture
    • Jan
    • Hideyuki Noda, et el., "The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture," IEEE Journal of Solid-State Circuits, Vol. 42, Issue 1, pp. 183 - 192, Jan. 2007
    • (2007) IEEE Journal of Solid-State Circuits , vol.42 , Issue.1 , pp. 183-192
    • Noda, H.1    el2
  • 5
    • 0033284915 scopus 로고    scopus 로고
    • Object Recognition from Local Scale-Invariant Features
    • Sept
    • David G. Lowe, "Object Recognition from Local Scale-Invariant Features," IEEE International Confernce on Computer Vision, Sept. 1999, pp. 1150-1157
    • (1999) IEEE International Confernce on Computer Vision , pp. 1150-1157
    • Lowe, D.G.1
  • 6
    • 11644259287 scopus 로고    scopus 로고
    • D. G. Elliott, et al., Computational RAM: a memory-SIMD hybrid and its application to DSP, IEEE Custom Integrated Circuits Conference, May 1992, pp. 30.6.1-30.6.4.
    • D. G. Elliott, et al., "Computational RAM: a memory-SIMD hybrid and its application to DSP," IEEE Custom Integrated Circuits Conference, May 1992, pp. 30.6.1-30.6.4.
  • 8
    • 0028539520 scopus 로고
    • A 3.84 GIPS integrated memory array processor with 64-processing elements and 2Mb SRAM
    • Nov
    • N. Yamashita, et al., "A 3.84 GIPS integrated memory array processor with 64-processing elements and 2Mb SRAM," IEEE Journal of Solid-State Circuits, Vol. 29, Issue 11, Nov. 1994, pp.1336-1343.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , Issue.11 , pp. 1336-1343
    • Yamashita, N.1
  • 10
    • 44849098706 scopus 로고    scopus 로고
    • Solutions for Real Chip Implementation Issues of
    • unpublished
    • Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seung-Jin Lee, and Hoi-Jun Yoo, "Solutions for Real Chip Implementation Issues of NoC and Their Application to Memory-Centric NoC," unpublished.
    • Kim, D.1    Kim, K.2    Kim, J.-Y.3    Lee, S.-J.4    Yoo, H.-J.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.