-
3
-
-
0033284915
-
Object Recognition from Local Scale-Invariant Features
-
Sept
-
David G. Lowe, "Object Recognition from Local Scale-Invariant Features," IEEE International Confernce on Computer Vision, pp. 1150-1157, Sept. 1999
-
(1999)
IEEE International Confernce on Computer Vision
, pp. 1150-1157
-
-
Lowe, D.G.1
-
4
-
-
3042786045
-
A Low-Power 3-D Rendering Engine With Two Texture Units and 29-Mb Embedded DRAM for 3G Multimedia Terminals
-
July
-
Ramchan Woo, et al., "A Low-Power 3-D Rendering Engine With Two Texture Units and 29-Mb Embedded DRAM for 3G Multimedia Terminals," IEEE Journal of Solid-State Circuits, vol. 39, no.7, pp. 1101-1109, July 2004.
-
(2004)
IEEE Journal of Solid-State Circuits
, vol.39
, Issue.7
, pp. 1101-1109
-
-
Woo, R.1
-
5
-
-
0032201772
-
1 GHz 64-bit high-speed comparator using ANT dynamic logic with two-phase clocking
-
Nov
-
C.-C Wang, C.-F. Wu, and K.-C. Tsai, "1 GHz 64-bit high-speed comparator using ANT dynamic logic with two-phase clocking," IEEE Proceedings of Computers and Digital Techniques, vol. 145, issue 6, pp. 433-436, Nov. 1998
-
(1998)
IEEE Proceedings of Computers and Digital Techniques
, vol.145
, Issue.6
, pp. 433-436
-
-
Wang, C.-C.1
Wu, C.-F.2
Tsai, K.-C.3
-
6
-
-
0037323076
-
High-Performance and Power-Efficient CMOS Comparators
-
Feb
-
C.-H Huang and J.-S. Wang, "High-Performance and Power-Efficient CMOS Comparators," IEEE Journal of Solid State Circuit, vol. 38, issue 2, pp. 254-262, Feb. 2003
-
(2003)
IEEE Journal of Solid State Circuit
, vol.38
, Issue.2
, pp. 254-262
-
-
Huang, C.-H.1
Wang, J.-S.2
-
7
-
-
44849121717
-
A High-Speed Magnitude Comparator With Small Transistor Count
-
Dec
-
S.-W. Cheng, "A High-Speed Magnitude Comparator With Small Transistor Count," IEEE Proceedings of International Conference on Electronics, Circuits and Systems, vol. 3, pp. 1168-1171, Dec. 2003
-
(2003)
IEEE Proceedings of International Conference on Electronics, Circuits and Systems
, vol.3
, pp. 1168-1171
-
-
Cheng, S.-W.1
-
8
-
-
0141638642
-
High Fan-In Dynamic CMOS Comparators With Low Transistor Count
-
Sep
-
C.-C. Wang, P.-M. Lee, C.-F. Wu, and H.-L. Wu, "High Fan-In Dynamic CMOS Comparators With Low Transistor Count," IEEE Transactions on Circuits and Systems I : Fundamental Theory and Applications, vol. 50, issue 9, pp. 1216-1220, Sep. 2003
-
(2003)
IEEE Transactions on Circuits and Systems I : Fundamental Theory and Applications
, vol.50
, Issue.9
, pp. 1216-1220
-
-
Wang, C.-C.1
Lee, P.-M.2
Wu, C.-F.3
Wu, H.-L.4
-
9
-
-
0036474883
-
Race logic architecture (RALA): A novel logic concept using the race scheme of input variables
-
Feb
-
Se-Joong Lee and Hoi-Jun Yoo, "Race logic architecture (RALA): a novel logic concept using the race scheme of input variables," IEEE Journal of Solid-State Circuits, vol. 37, issue 2, pp. 191-201, Feb. 2002
-
(2002)
IEEE Journal of Solid-State Circuits
, vol.37
, Issue.2
, pp. 191-201
-
-
Lee, S.-J.1
Yoo, H.-J.2
-
10
-
-
51349138565
-
-
Semiconductor Industry Association, National Technology Roadmap for Semiconductors
-
Semiconductor Industry Association, National Technology Roadmap for Semiconductors 1997
-
(1997)
-
-
-
11
-
-
0032592096
-
Design challenges of technology scaling
-
IEEE Micro, Iisue 4, pp, Jul.-Aug
-
Shekhar Borkar, "Design challenges of technology scaling", IEEE Micro, vol. 19, Iisue 4, pp. 23-29, Jul.-Aug. 1999
-
(1999)
, vol.19
, pp. 23-29
-
-
Borkar, S.1
|