A 231-MHz, 2.18-mW 32-bit logarithmic arithmetic unit for fixed-point 3-D graphics system

IEEE Journal of Solid-State Circuits

Volumn 41, Issue 11, 2006, Pages 2373-2380

  Kim, Hyejung ^a,b   Nam, Byeong Gyu ^b   Sohn, Ju Ho ^a,b   Woo, Jeong Ho ^a,b   Yoo, Hoi Jun ^a,b  

^a Korea Advanced Institute of Science and Technology ^*

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

3 D graphics; ALU; Antilogarithm; Logarithmic number system (LNS)

Indexed keywords

APPROXIMATION THEORY; COMPUTATION THEORY; ERROR ANALYSIS; MATHEMATICAL MODELS; PIPELINE PROCESSING SYSTEMS; THREE DIMENSIONAL COMPUTER GRAPHICS;

ALU; ANTILOGARITHM; LOGARITHMIC NUMBER SYSTEM (LNS);

DIGITAL ARITHMETIC;

EID: 33750808634     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.882887     Document Type: Conference Paper

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