Strategies for improving the parametric yield and profits of 3D ICs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2007, Pages 220-226

  Ferri, Cesare ^a   Reda, Sherief ^a   Bahar, R Iris ^a  

^a Brown University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D ICS; 3-D INTEGRATION; ACCESS TIME; COMMUNICATION TIME; COMPUTER-AIDED DESIGN; DEVICE SCALING; GRAPH-THEORETIC FRAMEWORK; INTEGRATION STRATEGIES; INTERNATIONAL CONFERENCES; L2 CACHE; MAIN MEMORIES; MARKET PRICING; PARAMETRIC YIELD; PROCESS VARIATIONS; SALES REVENUES; THREE-DIMENSIONAL INTEGRATED CIRCUITS; THROUGH-SILICON VIAS;

BINS; COMMUNICATION; COMPUTATIONAL GEOMETRY; DESIGN; DIES; ELECTRONICS INDUSTRY; INTEGRATED CIRCUITS; NONMETALS; REUSABILITY; SALES; SILICON; SPEED;

THREE DIMENSIONAL;

EID: 50249152514     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2007.4397269     Document Type: Conference Paper

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