Speed binning aware design methodology to improve profit under parameter variations

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2006, Issue , 2006, Pages 712-717

  Datta, Animesh ^a   Bhunia, Swarup ^b   Choi, Jung Hwan ^a   Mukhopadhyay, Saibal ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

^b CASE WESTERN RESERVE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; COST ACCOUNTING; PARAMETER ESTIMATION; PRODUCT DEVELOPMENT;

FREQUENCY BINNING; HIGH-PERFORMANCE SYSTEMS; NANOMETER TECHNOLOGIES; STATISTICAL DESIGN METHODOLOGIES;

NANOTECHNOLOGY;

EID: 33748605292     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1118299.1118466     Document Type: Conference Paper

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