Multiple-parameter CMOS IC testing with increased sensitivity for I DDQ

IEEE International Test Conference (TC)

Volumn , Issue , 2000, Pages 1051-1059

  Keshavarzi, Ali ^a   Roy, Kaushik ^a   Sachdev, Manoj ^a   Hawkins, Charles F ^a   Soumyanath, K ^a   De, Vivek ^a  

^a Microprocessor Research Lab   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; DEFECT DETECTION SENSITIVITY; LEAKAGE REDUCTION TECHNIQUE; REVERSE BODY BIAS;

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; FREQUENCIES; THERMAL EFFECTS; TRANSISTORS;

INTEGRATED CIRCUIT TESTING;

EID: 0034476398     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)