Effectiveness of I-V testing in comparison to IDDq tests [IC testing]

Proceedings of the IEEE VLSI Test Symposium

Volumn 2003-January, Issue , 2003, Pages 47-52

  Vogels, T J ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Testing; Very large scale integration

Indexed keywords

TESTING; VLSI CIRCUITS;

IC TESTING; TEST CRITERIA; TEST EFFECTIVENESS; TEST METHOD;

INTEGRATION TESTING;

EID: 3142756286     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.2003.1197632     Document Type: Conference Paper

References (10)

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2. P. Nigh and A. Gattiker, "Test Method Evaluation Experiments and Data,". International Test Conference 2000, Washington, DC, USA, October 2000, pp. 454-463.
3. th IEEE VLSI Test Symposium, IEEE Computer Soc. Press; Los Alamitos, CA, USA, 27 April-1 May 1997, pp. 68-73.
4. A. C. Miller, "IDDq Testing in Deep-Submicron Integrated Circuits," IEEE International Test Conference, IEEE Press, Piscataway, N.J., 1999, pp. 724-729.
5. P. Maxwell et al., "Current Ratios: A Self-Scaling Technique for Production IDDQ Testing,". IEEE International Test Conference, IEEE Press, Piscataway, N.J., 1999, pp.738-746.
6. J. Soden and C. Hawkins, "IDDq Testing: Issues Present and Future," IEEE Design and Test of Computers, Winter 1996, pp. 61-65.
7. M. Sachdev, "IDDq Test and Diagnosis in Deep Submicron," IDDq Test Workshop, Washington, D.C. March 1994, pp. 84-89.
8. th Annual International Reliability Physics Symposium, San Jose, CA, 2000, pp. 407-412.
9. T.W. Williams et al., "Iddq Test: Sensitivity Analysis of Scaling," IEEE International Test Conference, 1996, pp. 786-792.
10. A. Righter et al., "CMOS IC Reliability Indicators and Burn-In Economics," IEEE International Test Conference, pp. 194-203.