A NUCA model for embedded systems cache design

Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia

Volumn 2005, Issue , 2005, Pages 41-46

  Foglia, Pierfrancesco ^a,b   Mangano, Daniele ^a,b   Prete, Cosimo Antonio ^a,b  

^a Dipartimento di Ingegneria dell'Informazione   (Italy)

^b Hipeac EU Network of Excellence   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC NON-UNIFORM CACHE ARCHITECTURES (DNUCA); EMBEDDED APPLICATIONS;

CACHE MEMORY; ELECTRIC POWER UTILIZATION; SILICON;

EMBEDDED SYSTEMS;

EID: 33747443513     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESTMED.2005.1518068     Document Type: Conference Paper

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