Addressing the system-on-a-chip interconnect woes through communication-based design

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 667-672

  Sgroi, M ^a   Sheets, M ^a   Mihal, A ^a   Keutzer, K ^a   Malik, S ^a   Rabaey, J ^a   Sangiovanni Vincentelli, A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Communication based design; Network on chip; Platform based design; Protocol stack

Indexed keywords

CHIP SCALE PACKAGES; COMPUTATIONAL METHODS; NETWORK PROTOCOLS; SYNCHRONIZATION; TELECOMMUNICATION SYSTEMS;

INTERCONNECT WOES; SYSTEM-ON-A-CHIP (SOC);

INTERCONNECTION NETWORKS;

EID: 0034846659     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378239.379045     Document Type: Conference Paper

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