A Self-Tuning Cache Architecture for Embedded Systems

ACM Transactions on Embedded Computing Systems

Volumn 3, Issue 2, 2004, Pages 407-425

  Zhang, Chuanjun ^a   Vahid, Frank ^a   Lysecky, Roman ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

architecture tuning; Cache; configurable; Design; dynamic optimization; embedded systems; Experimentation; low energy; low power; on chip CAD; Performance

Indexed keywords

EID: 85024279046     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/993396.993405     Document Type: Article

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