Powering networks on chips: Energy-efficient and reliable interconnect design for SoCs

Proceedings of the International Symposium on System Synthesis

Volumn , Issue , 2001, Pages 33-38

  Benini, L ^a   De Micheli, G ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

Low energy design; Networks; Systems on Chips

Indexed keywords

CROSSTALK; ENERGY UTILIZATION; GATES (TRANSISTOR); QUALITY OF SERVICE; SIGNAL INTERFERENCE; SPURIOUS SIGNAL NOISE;

SYSTEM ON CHIPS (SOC);

CHIP SCALE PACKAGES;

EID: 0034785285     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (23)

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