Solving hard instances of floorplacement

Proceedings of the International Symposium on Physical Design

Volumn 2006, Issue , 2006, Pages 170-177

  Ng, Aaron ^a   Markov, Igor L ^a   Aggarwal, Rajat ^b   Ramachandran, Venky ^c  

^a The Department of Civil and Environmental Engineering   (United States)

^b XILINX INC   (United States)

^c Calypto Design Systems   (United States)

Author keywords

Benchmarks; Circuit layout; Floorplacement; Floorplanning; Placement; RTL

Indexed keywords

ALGORITHMS; FAILURE ANALYSIS; LAWS AND LEGISLATION; LOGIC GATES; PROBLEM SOLVING; STORAGE ALLOCATION (COMPUTER);

BENCHMARKS; FLOORPLACEMENT; FLOORPLANNING; PLACEMENT; RTL;

INTEGRATED CIRCUIT LAYOUT;

EID: 33745939879     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1123008.1123047     Document Type: Conference Paper

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