Min-cut floorplacement

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 7, 2006, Pages 1313-1326

  Roy, Jarrod A ^a   Adya, Saurabh N ^b   Papa, David A ^a   Markov, Igor L ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b Synplicity Inc   (United States)

Author keywords

Algorithms; Design automation; Integrated circuit layout; Software; Very large scale integration

Indexed keywords

DESIGN AUTOMATION; FLOORPLANNING TECHNIQUES; GENERAL PLACEMENT; ROBUST ALGORITHMS;

ALGORITHMS; COMPUTER AIDED DESIGN; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; INTEGRATED CIRCUIT LAYOUT; PROBLEM SOLVING; ROBUSTNESS (CONTROL SYSTEMS); VLSI CIRCUITS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 33744778757     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.855969     Document Type: Article

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