A new reliability-oriented place and route algorithm for SRAM-based FPGAs

IEEE Transactions on Computers

Volumn 55, Issue 6, 2006, Pages 732-744

  Sterpone, Luca ^a   Violante, Massimo ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

FPGA; Place and route; Reliability; Transient fault injection

Indexed keywords

RELIABILITY-ORIENTED PLACE AND ROUTE ALGORITHM; SINGLE EVENT UPSETS; TRANSIENT FAULTS; TRIPLE MODULAR REDUNDANCY;

FAULT TOLERANT COMPUTER SYSTEMS; REDUNDANCY; STATIC RANDOM ACCESS STORAGE; STORAGE ALLOCATION (COMPUTER); VLSI CIRCUITS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33646472893     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2006.82     Document Type: Article

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