Radiation test methodology for SRAM-based FPGAs by using THESIC+

Proceedings - 9th IEEE International On-Line Testing Symposium, IOLTS 2003

Volumn , Issue , 2003, Pages 162-

  Alderighi, M ^a   Casini, F ^b   D'Angelo, S ^a   Faure, F ^c   Mancini, M ^a   Pastore, S ^b   Sechi, G R ^a   Velazco, R ^c  

^a CNR   (Italy)

^b Sanitas EG Srl   (Italy)

^c TIMA LABORATORY   (France)

Author keywords

Circuit faults; Circuit testing; Conferences; Fault tolerance; Field programmable gate arrays; Laboratories; Performance evaluation; Single event upset; Space technology; System testing

Indexed keywords

COMPUTER CONTROL SYSTEMS; DIGITAL STORAGE; FAULT TOLERANCE; FLASH MEMORY; LABORATORIES; RADIATION HARDENING; SPACE APPLICATIONS; STATIC RANDOM ACCESS STORAGE;

CIRCUIT FAULTS; CIRCUIT TESTING; CONFERENCES; PERFORMANCE EVALUATION; SINGLE EVENT UPSETS; SPACE TECHNOLOGIES; SYSTEM TESTING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 10444248972     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2003.1214388     Document Type: Conference Paper

References (3)

1. F.Faure, P. Peronnard, R. Velazco and R. Ecoffet, "THESIC+, a flexible system for SEE testing", Proceedings of RADECS Workshop, [September 19-20, 2002, Padova], pp. 231-234.
2. M. Alderighi, S. D'Angelo, C. Metra, and G.R. Sechi, "Novel Fault-Tolerant Adder Design for FPGA-Based Systems", Proc. of the 7th IEEE Int'l On-Line Testing Workshop, [July 9-11, 2001Giardini Naxos, Italy,], pp. 54-58.
3. S. Mitra, N.R. Saxena, and E.J. McCluskey, "Common-Mode Failures in Redundant VLSI Systems: A Survey", IEEE Trans. on Reliability, vol. 49, n.4, September 2000, pp. 285-29.