FPGA architectural research: A survey

IEEE Design and Test of Computers

Volumn 13, Issue 4, 1996, Pages 9-15

  Brown, Stephen ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; LOGIC DESIGN; MICROPROCESSOR CHIPS; PERFORMANCE; RANDOM ACCESS STORAGE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FIELD PROGRAMMABLE MEMORY (FPM); LOGIC BLOCK COMPLEXITY; LOGIC EMULATION;

LOGIC GATES;

EID: 0030407224     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.544531     Document Type: Article

References (6)