The reliability of FPGA circuit designs in the presence of radiation induced configuration upsets

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2003-January, Issue , 2003, Pages 133-142

  Wirthlin, M ^a   Johnson, E ^a   Rollins, N ^a   Caffrey, M ^b   Graham, P ^b  

^a Brigham Young University   (United States)

^b LOS ALAMOS NATIONAL LABORATORY   (United States)

Author keywords

Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Field programmable gate arrays; Laboratories; Remote sensing; Single event transient; Single event upset; Space vehicles

Indexed keywords

CIRCUIT SIMULATION; COMPUTER CONTROL SYSTEMS; COMPUTERS; DIGITAL STORAGE; FLASH MEMORY; INTEGRATED CIRCUIT MANUFACTURE; LABORATORIES; LOGIC GATES; ORBITS; RADIATION HARDENING; REMOTE SENSING; SPACE OPTICS; TRANSIENTS;

CIRCUIT FAULTS; CIRCUIT TESTING; COMPUTATIONAL MODEL; SINGLE EVENT TRANSIENTS; SINGLE EVENT UPSETS; SPACE VEHICLES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84942934270     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227249     Document Type: Conference Paper

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