Time redundancy based soft-error tolerance to rescue nanometer technologies

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1999, Pages 86-94

  Nicolaidis, M ^a  

^a TIMA LABORATORY   (France)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT TOLERANT DESIGN; SINGLE EVENT UPSETS; SOFT ERRORS; VERY DEEP SUBMICRON;

ERROR CORRECTION; ERROR DETECTION; FAILURE ANALYSIS; INTEGRATED CIRCUIT LAYOUT; RELIABILITY; VLSI CIRCUITS;

INTEGRATED CIRCUIT TESTING;

EID: 0032684765     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (17)