Application of an SOI 0.12-μm CMOS technology to SoCs with low-power and high-frequency circuits

IBM Journal of Research and Development

Volumn 47, Issue 5-6, 2003, Pages 611-630

  Plouchart, Jean Olivier ^a   Zamdmer, Noah ^a   Kim, Jonghae ^a   Sherony, Melanie ^a   Tan, Yue ^a   Ray, Asit ^a   Talbi, Mohamed ^a   Wagner, Lawrence F ^a   Wu, Kun ^a   Lustig, Naftali E ^a   Narasimha, Shreesh ^a   O'Neil, Patricia ^a   Phan, Nghia ^b   Rohn, Michael ^b   Strom, James ^b   Friend, David M ^b   Kosonocky, Stephen V ^c   Knebel, Daniel R ^c   Kim, Suhwan ^c   Jenkins, Keith A ^c   Rivier, Michel M ^d   more..

^a IBM MICROELECTRONICS   (United States)

^b IBM   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

^d IBM   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DIGITAL CIRCUITS; DIGITAL SIGNAL PROCESSING; DYNAMIC RANDOM ACCESS STORAGE; ENERGY DISSIPATION; ENERGY EFFICIENCY; ENERGY MANAGEMENT; MICROPROCESSOR CHIPS; PHASE LOCKED LOOPS; POWER CONTROL; SILICON ON INSULATOR TECHNOLOGY; WIRELESS TELECOMMUNICATION SYSTEMS;

ANALOG CIRCUITS; TRANSISTOR SCALING;

CMOS INTEGRATED CIRCUITS;

EID: 0348158502     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.475.0611     Document Type: Article

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