Super compact RFIC inductors in 0.18μm CMOS with copper interconnects

IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers

Volumn , Issue , 2002, Pages 443-446

  Feng, H ^a   Jelodin, G ^a   Gong, K ^a   Zhan, R ^a   Wu, Q ^a   Chen, C ^a   Wang, A ^a  

^a Illinois Institute of Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COST EFFECTIVENESS; ELECTRIC CONNECTORS; ELECTRIC INDUCTORS; MAGNETIC LEAKAGE; SURFACE MOUNT TECHNOLOGY;

RADIO FREQUENCY INTEGRAL CIRCUITS (RFIC); SUB MICRON TECHNOLOGIES;

CMOS INTEGRATED CIRCUITS;

EID: 0036309535     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Future directions in silicon IC's for RF personal communications
2. Accurate modeling of high-Q spiral inductors in thin-film multilayer technology for wireless telecommunication applications
3. Spiral and solenoidal inductor structures silicon using cu-damascene interconnects
4. Modeling, characterization and design of monolithic inductors for silicon RFIC's
5. Spiral inductors and transmission lines in silicon technology using copper-damascene interconnects and low-loss substrates
6. Stacked inductors and transformers in CMOS technology
7. Simple accurate expressions for planar spiral inductances
8. On-chip spiral inductors with patterned ground shields for Si-based RFICs