A high performance 0.13 μm SOI CMOS technology with a 70 nm silicon film and with a second generation low-k Cu BEOL

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 245-248

  Sleight, J W ^a   Varekamp, P R ^a   Lustig, N ^a   Adkisson, J ^a   Allen, A ^a   Bula, O ^a   Chen, X ^a   Chou, T ^a   Chu, W ^a   Fitzsimmons, J ^a   Gabor, A ^a   Gates, S ^a   Jamison, P ^a   Khare, M ^a   Lai, L ^a   Lee, J ^a   Narasimha, S ^a   Ellis Monaghan, J ^a   Peterson, K ^a   Rauch, S ^a   Shukla, S ^a   Smeys, P ^a   Su, T C ^a   Quinlan, J ^a   Vayshenker, A ^a   Ward, B ^a   Womack, S ^a   Barth, E ^a   Biery, G ^a   Davis, C ^a   Ferguson, R ^a   Goldblatt, R ^a   Leobandung, E ^a   Welser, J ^a   Yang, I ^a   Agnello, P ^a   more..

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; DIELECTRIC MATERIALS; GATES (TRANSISTOR); INTERCONNECTION NETWORKS; LITHOGRAPHY; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTING FILMS; SEMICONDUCTING SILICON; SILICON CARBIDE; SILICON ON INSULATOR TECHNOLOGY; STATIC RANDOM ACCESS STORAGE; TUNGSTEN;

COPPER WIRING; SILICON FILM; SUB RESOLUTION ASSIST FEATURES;

CMOS INTEGRATED CIRCUITS;

EID: 0035714324     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)