High-performance three-dimensional on-chip inductors in SOI CMOS technology for monolithic RF circuit applications

IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers

Volumn , Issue , 2003, Pages 591-594

  Kim, Jonghae ^a   Plouchart, Jean Olivier ^b   Zamdmer, Noah ^a   Fong, Neric ^c   Lu, Liang Hung ^a   Tan, Yue ^a   Jenkins, Keith A ^b   Sherony, Melanie ^a   Groves, Robert ^a   Kumar, Mahender ^a   Ray, Asit ^a  

^a IBM RESEARCH   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

^c CARLETON UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC INDUCTORS; ELECTRIC NETWORK ANALYSIS; Q FACTOR MEASUREMENT; SEMICONDUCTOR DEVICE MODELS;

SYSTEM ON CHIP (SOC) TECHNOLOGY;

CMOS INTEGRATED CIRCUITS;

EID: 0043162165     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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7. B. Piernas, et al, "High-Q factor three-dimensional inductors", IEEE Trans. Microwave Theory and Tech., vol. 50, pp 1942-1949, Aug. 2002.
8. X. Huo, et al, "High-Q copper inductors on standard silicon substrate with a low-k BCB dielectric layer", IEEE RFIC, pp. 403-406, June 2002.
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10. X. Huo, et al, "Silicon-based high-Q inductor incorporating electroplated copper and low-K BCB dielectric", IEEE Electron Device Letters, vol. 23, no. 9, pp. 529-522, Sep. 2002.
11. D.Kelly and F. Wright, "Improvements to performance of spiral inductors on insulators", IEEE RFIC2002, pp. 431-433, June 2002.